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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-11-15 21:38:55 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-11-15 21:38:55 +0000 |
| commit | cb887486ef2a2118b23aca83a48b98ca1443cc6f (patch) | |
| tree | e8448211578bd4a1e23cd70fb58d87aa7896667c /testsuites/psxtests/ChangeLog | |
| parent | 2000-11-14 Jiri Gaisler <jgais@ws.estec.esa.nl> (diff) | |
| download | rtems-cb887486ef2a2118b23aca83a48b98ca1443cc6f.tar.bz2 | |
2000-11-14 Jiri Gaisler <jgais@ws.estec.esa.nl>
* shared/src/cache_manager.c
(rtems_cache_invalidate_multiple_instruction_lines): If
CPU_INSTRUCTION_CACHE_ALIGNMENT is defined but 0, then there is
an instruction cache but no notion of line size.
Diffstat (limited to 'testsuites/psxtests/ChangeLog')
0 files changed, 0 insertions, 0 deletions