microblaze: Add support for libbsd networking

This includes fixes and improvements necessary to get libbsd networking
running.

9 files changed, 139 insertions, 1 deletions

diff --git a/spec/build/bsps/microblaze/microblaze_fpga/grp.yml b/spec/build/bsps/microblaze/microblaze_fpga/grp.yml
index 991ab04a23..3069ff2ff8 100644
--- a/spec/build/bsps/microblaze/microblaze_fpga/grp.yml
+++ b/spec/build/bsps/microblaze/microblaze_fpga/grp.yml
@@ -18,6 +18,20 @@ links:
 - role: build-dependency
   uid: optconsoleinterrupts
 - role: build-dependency
+  uid: optdcachebaseaddress
+- role: build-dependency
+  uid: optdcachelinelen
+- role: build-dependency
+  uid: optdcachesize
+- role: build-dependency
+  uid: optdtbheaderpath
+- role: build-dependency
+  uid: opticachebaseaddress
+- role: build-dependency
+  uid: opticachelinelen
+- role: build-dependency
+  uid: opticachesize
+- role: build-dependency
   uid: optintcbaseaddress
 - role: build-dependency
   uid: opttimerbaseaddress
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/obj.yml b/spec/build/bsps/microblaze/microblaze_fpga/obj.yml
index 889a8de5a3..d38044cea2 100644
--- a/spec/build/bsps/microblaze/microblaze_fpga/obj.yml
+++ b/spec/build/bsps/microblaze/microblaze_fpga/obj.yml
@@ -23,7 +23,6 @@ source:
 - bsps/microblaze/microblaze_fpga/clock/clock.c
 - bsps/microblaze/microblaze_fpga/console/console-io.c
 - bsps/microblaze/microblaze_fpga/console/debug-io.c
-- bsps/microblaze/microblaze_fpga/dts/microblaze-dtb.c
 - bsps/microblaze/microblaze_fpga/fdt/bsp_fdt.c
 - bsps/microblaze/microblaze_fpga/irq/irq.c
 - bsps/microblaze/microblaze_fpga/start/_exception_handler.S
@@ -32,6 +31,10 @@ source:
 - bsps/microblaze/microblaze_fpga/start/bspreset.c
 - bsps/microblaze/microblaze_fpga/start/bspstart.c
 - bsps/microblaze/microblaze_fpga/start/crtinit.S
+- bsps/microblaze/microblaze_fpga/start/microblaze_enable_dcache.S
+- bsps/microblaze/microblaze_fpga/start/microblaze_enable_icache.S
+- bsps/microblaze/microblaze_fpga/start/microblaze_invalidate_dcache.S
+- bsps/microblaze/microblaze_fpga/start/microblaze_invalidate_icache.S
 - bsps/microblaze/shared/dev/serial/uartlite.c
 - bsps/microblaze/shared/dev/serial/uartlite_l.c
 - bsps/shared/cache/nocache.c
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/optdcachebaseaddress.yml b/spec/build/bsps/microblaze/microblaze_fpga/optdcachebaseaddress.yml
new file mode 100644
index 0000000000..d9f48db96c
--- /dev/null
+++ b/spec/build/bsps/microblaze/microblaze_fpga/optdcachebaseaddress.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
+default: 0x80000000
+default-by-variant: []
+description: |
+  base address of the data cache
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_MICROBLAZE_FPGA_DCACHE_BASE
+type: build
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/optdcachelinelen.yml b/spec/build/bsps/microblaze/microblaze_fpga/optdcachelinelen.yml
new file mode 100644
index 0000000000..2a9af43baa
--- /dev/null
+++ b/spec/build/bsps/microblaze/microblaze_fpga/optdcachelinelen.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
+default: 4
+default-by-variant: []
+description: |
+  length of the data cache line
+enabled-by: true
+format: '{}'
+links: []
+name: BSP_MICROBLAZE_FPGA_DCACHE_LINE_LEN
+type: build
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/optdcachesize.yml b/spec/build/bsps/microblaze/microblaze_fpga/optdcachesize.yml
new file mode 100644
index 0000000000..71a39a0f10
--- /dev/null
+++ b/spec/build/bsps/microblaze/microblaze_fpga/optdcachesize.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
+default: 32768
+default-by-variant: []
+description: |
+  size of the data cache in bytes
+enabled-by: true
+format: '{}'
+links: []
+name: BSP_MICROBLAZE_FPGA_DCACHE_SIZE
+type: build
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/optdtbheaderpath.yml b/spec/build/bsps/microblaze/microblaze_fpga/optdtbheaderpath.yml
new file mode 100644
index 0000000000..6432e8b77f
--- /dev/null
+++ b/spec/build/bsps/microblaze/microblaze_fpga/optdtbheaderpath.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
+default: bsp/microblaze-dtb.h
+default-by-variant: []
+description: |
+  the path to the header file containing the device tree binary. See the BSP
+  documentation for more information.
+enabled-by: true
+format: '{}'
+links: []
+name: BSP_MICROBLAZE_FPGA_DTB_HEADER_PATH
+type: build
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/opticachebaseaddress.yml b/spec/build/bsps/microblaze/microblaze_fpga/opticachebaseaddress.yml
new file mode 100644
index 0000000000..9cb71fc2b8
--- /dev/null
+++ b/spec/build/bsps/microblaze/microblaze_fpga/opticachebaseaddress.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
+default: 0x80000000
+default-by-variant: []
+description: |
+  base address of the instruction cache
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_MICROBLAZE_FPGA_ICACHE_BASE
+type: build
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/opticachelinelen.yml b/spec/build/bsps/microblaze/microblaze_fpga/opticachelinelen.yml
new file mode 100644
index 0000000000..0c0a55011f
--- /dev/null
+++ b/spec/build/bsps/microblaze/microblaze_fpga/opticachelinelen.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
+default: 8
+default-by-variant: []
+description: |
+  length of the instruction cache line
+enabled-by: true
+format: '{}'
+links: []
+name: BSP_MICROBLAZE_FPGA_ICACHE_LINE_LEN
+type: build
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/opticachesize.yml b/spec/build/bsps/microblaze/microblaze_fpga/opticachesize.yml
new file mode 100644
index 0000000000..2b5f083dea
--- /dev/null
+++ b/spec/build/bsps/microblaze/microblaze_fpga/opticachesize.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
+default: 32768
+default-by-variant: []
+description: |
+  size of the instruction cache in bytes
+enabled-by: true
+format: '{}'
+links: []
+name: BSP_MICROBLAZE_FPGA_ICACHE_SIZE
+type: build