diff options
| author | Chris Johns <chrisj@rtems.org> | 2021-07-13 20:47:08 -1000 |
|---|---|---|
| committer | Chris Johns <chrisj@rtems.org> | 2021-07-15 09:59:14 +1000 |
| commit | 6f2aa8ad36e3aaffc9fa2cb8c744b04da7339ee2 (patch) | |
| tree | 4d3d14603856958cc2ec367e9d7763d210af2358 /spec/build/bsps/powerpc/virtex4 | |
| parent | bsps/sparc: Improve interrupt affinity support (diff) | |
| download | rtems-6f2aa8ad36e3aaffc9fa2cb8c744b04da7339ee2.tar.bz2 | |
build: Use BSP family for options
- Optionally add support for 'default-by-family' to allow
option to be set by a family and so all related BSPs
Close #4468
Diffstat (limited to 'spec/build/bsps/powerpc/virtex4')
| -rw-r--r-- | spec/build/bsps/powerpc/virtex4/abi.yml | 1 | ||||
| -rw-r--r-- | spec/build/bsps/powerpc/virtex4/optppccachedata.yml | 1 | ||||
| -rw-r--r-- | spec/build/bsps/powerpc/virtex4/optsprg.yml | 1 | ||||
| -rw-r--r-- | spec/build/bsps/powerpc/virtex4/optvecbase.yml | 1 |
4 files changed, 4 insertions, 0 deletions
diff --git a/spec/build/bsps/powerpc/virtex4/abi.yml b/spec/build/bsps/powerpc/virtex4/abi.yml index 1fc318b3cb..dbeff9ebad 100644 --- a/spec/build/bsps/powerpc/virtex4/abi.yml +++ b/spec/build/bsps/powerpc/virtex4/abi.yml @@ -9,6 +9,7 @@ copyrights: default: - -Dppc405 - -mcpu=405 +default-by-family: [] default-by-variant: [] description: | ABI flags diff --git a/spec/build/bsps/powerpc/virtex4/optppccachedata.yml b/spec/build/bsps/powerpc/virtex4/optppccachedata.yml index ef96c06b8e..9ccbf7cf79 100644 --- a/spec/build/bsps/powerpc/virtex4/optppccachedata.yml +++ b/spec/build/bsps/powerpc/virtex4/optppccachedata.yml @@ -6,6 +6,7 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: true +default-by-family: [] default-by-variant: [] description: | If defined, then the PowerPC specific code in RTEMS will use data cache instructions to optimize the context switch code. This code can conflict with debuggers or emulators. It is known to break the Corelis PowerPC emulator with at least some combinations of PowerPC 603e revisions and emulator versions. The BSP actually contains the call that enables this. diff --git a/spec/build/bsps/powerpc/virtex4/optsprg.yml b/spec/build/bsps/powerpc/virtex4/optsprg.yml index 1e1a112f43..978a5dcd85 100644 --- a/spec/build/bsps/powerpc/virtex4/optsprg.yml +++ b/spec/build/bsps/powerpc/virtex4/optsprg.yml @@ -6,6 +6,7 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: true +default-by-family: [] default-by-variant: [] description: | If defined, then the PowerPC specific code in RTEMS will use some of the special purpose registers to slightly optimize interrupt response time. The use of these registers can conflict with other tools like debuggers. diff --git a/spec/build/bsps/powerpc/virtex4/optvecbase.yml b/spec/build/bsps/powerpc/virtex4/optvecbase.yml index fdc72a1863..5f8265b0d4 100644 --- a/spec/build/bsps/powerpc/virtex4/optvecbase.yml +++ b/spec/build/bsps/powerpc/virtex4/optvecbase.yml @@ -6,6 +6,7 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: 256 +default-by-family: [] default-by-variant: [] description: | This defines the base address of the exception table. |