diff options
author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2020-12-08 07:56:53 +0100 |
---|---|---|
committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2020-12-10 07:58:03 +0100 |
commit | bd7bef528db094914cefef040ddca6c5a0e963d1 (patch) | |
tree | 92c29470cbf7a32bf6af70076e355621496e7873 /spec/build/bsps/arm/optgtsyscntcr.yml | |
parent | bsps/arm: Unify ARM Generic Timer options (diff) | |
download | rtems-bd7bef528db094914cefef040ddca6c5a0e963d1.tar.bz2 |
bsps/arm: Support system level ARM Generic Timer
Update #4202.
Diffstat (limited to 'spec/build/bsps/arm/optgtsyscntcr.yml')
-rw-r--r-- | spec/build/bsps/arm/optgtsyscntcr.yml | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/spec/build/bsps/arm/optgtsyscntcr.yml b/spec/build/bsps/arm/optgtsyscntcr.yml new file mode 100644 index 0000000000..6278bf0f53 --- /dev/null +++ b/spec/build/bsps/arm/optgtsyscntcr.yml @@ -0,0 +1,20 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- format-and-define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: 1 +default-by-variant: +- value: 257 + variants: + - arm/fvp_cortex_r52 +description: | + Defines the initialization value of the CNTCR register of the memory-mapped + system level ARM Generic Timer. +format: '{:#010x}' +enabled-by: true +links: [] +name: ARM_GENERIC_TIMER_SYSTEM_CNTCR +type: build |