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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2023-01-12 10:26:38 +0100 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2023-01-17 08:31:48 +0100 |
commit | d2664faa39cfd17fa20c84d0ff1623335c21bdac (patch) | |
tree | c6503cc795816f0c4f03ed74fd764878e017979b /spec/build/bsps/arm/altera-cyclone-v/optclkfastidle.yml | |
parent | build: Format build items (diff) | |
download | rtems-d2664faa39cfd17fa20c84d0ff1623335c21bdac.tar.bz2 |
build: Replace variant patterns with a list
Replace the variant patterns in the default-by-variant list with an
explicit list of matching BSPs.
The change was tested by comparing the output of
./waf bspdefaults
before and after the change.
Diffstat (limited to 'spec/build/bsps/arm/altera-cyclone-v/optclkfastidle.yml')
-rw-r--r-- | spec/build/bsps/arm/altera-cyclone-v/optclkfastidle.yml | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/spec/build/bsps/arm/altera-cyclone-v/optclkfastidle.yml b/spec/build/bsps/arm/altera-cyclone-v/optclkfastidle.yml index b800b20428..61333a11f1 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/optclkfastidle.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/optclkfastidle.yml @@ -9,7 +9,9 @@ default: false default-by-variant: - value: true variants: - - arm/.*qemu + - arm/lm3s6965_qemu + - arm/realview_pbx_a9_qemu + - arm/xilinx_zynq_a9_qemu description: | This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing. This can significantly reduce simulation times. enabled-by: true |