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authorKinsey Moore <kinsey.moore@oarcorp.com>2021-09-18 20:23:53 -0500
committerJoel Sherrill <joel@rtems.org>2021-09-21 08:58:32 -0500
commit670a5089e2ff80beb508784f0141a9d28a091dff (patch)
treebe6433a533380c976c0079d9a6f209d9c46e8323 /spec/build/bsps/aarch64/xilinx-zynqmp
parentbsps/zynqmp: Use correct number of interrupts (diff)
downloadrtems-670a5089e2ff80beb508784f0141a9d28a091dff.tar.bz2
bsps/gicv2: Allow BSPs to define IRQ attributes
ARM's GICv2 is configurable and its attributes vary between implementations including omission of specific interrupts. This allows BSPs to accomodate those varying implementations with customized attribute sets.
Diffstat (limited to 'spec/build/bsps/aarch64/xilinx-zynqmp')
-rw-r--r--spec/build/bsps/aarch64/xilinx-zynqmp/obj.yml1
1 files changed, 1 insertions, 0 deletions
diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/obj.yml b/spec/build/bsps/aarch64/xilinx-zynqmp/obj.yml
index d8286bec35..4f6b9c44d8 100644
--- a/spec/build/bsps/aarch64/xilinx-zynqmp/obj.yml
+++ b/spec/build/bsps/aarch64/xilinx-zynqmp/obj.yml
@@ -28,6 +28,7 @@ source:
- bsps/shared/dev/clock/arm-generic-timer.c
- bsps/shared/dev/getentropy/getentropy-cpucounter.c
- bsps/shared/dev/irq/arm-gicv2.c
+- bsps/shared/dev/irq/arm-gicv2-zynqmp.c
- bsps/shared/dev/serial/console-termios-init.c
- bsps/shared/dev/serial/console-termios.c
- bsps/shared/irq/irq-default-handler.c