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authorSebastian Huber <sebastian.huber@embedded-brains.de>2022-09-12 10:35:21 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2023-01-17 08:31:48 +0100
commitf20078acea88f7c38f14cbc206053e50c313c357 (patch)
treeb00ad4ff46b7da85f4b5206561961d0317b86375 /spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c0.yml
parentbuild: Replace variant patterns with a list (diff)
downloadrtems-f20078acea88f7c38f14cbc206053e50c313c357.tar.bz2
build: Use enabled by for defaults
Merge the "default" and "default-by-variant" attributes. Use an "enabled-by" expression to select the default value based on the enabled set. This makes it possible to select default values depending on other options. For example you could choose memory settings based on whether RTEMS_SMP is enabled or disabled. The change was tested by comparing the output of ./waf bspdefaults before and after the change.
Diffstat (limited to 'spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c0.yml')
-rw-r--r--spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c0.yml17
1 files changed, 3 insertions, 14 deletions
diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c0.yml b/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c0.yml
index 1005594abe..c3793e9aae 100644
--- a/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c0.yml
+++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c0.yml
@@ -6,20 +6,9 @@ build-type: option
copyrights:
- Copyright (C) 2021 On-Line Applications Research (OAR)
- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 111111111
-default-by-variant:
-- value: 111111111
- variants:
- - aarch64/xilinx_zynqmp_ilp32_qemu
-- value: 111111111
- variants:
- - aarch64/xilinx_zynqmp_ilp32_zu3eg
-- value: 111111111
- variants:
- - aarch64/xilinx_zynqmp_lp64_qemu
-- value: 111111111
- variants:
- - aarch64/xilinx_zynqmp_lp64_zu3eg
+default:
+- enabled-by: true
+ value: 111111111
description: |
ZynqMP i2c0 clock frequency in Hz. This is the frequency after the signal
has been processed using the values passed to the I2C0_REF_CTRL register.