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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-04-22 10:15:39 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-04-28 09:26:19 +0200 |
| commit | 7c0bd74c87b141454ae17ee1cfeeba42dc4b0df2 (patch) | |
| tree | cda34ba07b75edb4e4bf9e39424adfd785cfcc3f /doc | |
| parent | sparc: Document register g7 usage (diff) | |
| download | rtems-7c0bd74c87b141454ae17ee1cfeeba42dc4b0df2.tar.bz2 | |
sparc: Add _CPU_Get_current_per_CPU_control()
Use register g6 for the per-CPU control of the current processor. The
register g6 is reserved for the operating system by the SPARC ABI. On
Linux register g6 is used for a similar purpose with the same method
since 1996.
The register g6 must be initialized during system startup and then must
remain unchanged.
Since the per-CPU control is used in all critical sections of the
operating system, this is a performance optimization for the operating
system core procedures. An additional benefit is that the low-level
context switch and interrupt processing code is now identical on non-SMP
and SMP configurations.
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/cpu_supplement/sparc.t | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/doc/cpu_supplement/sparc.t b/doc/cpu_supplement/sparc.t index a6862c8aa2..d0b7641e28 100644 --- a/doc/cpu_supplement/sparc.t +++ b/doc/cpu_supplement/sparc.t @@ -401,6 +401,11 @@ The registers g2 through g4 are reserved for applications. GCC uses them as volatile registers by default. So they are treated like volatile registers in RTEMS as well. +The register g6 is reserved for the operating system and contains the address +of the per-CPU control block of the current processor. This register is +initialized during system start and then remains unchanged. It is not +saved/restored by the context switch or interrupt processing code. + The register g7 is reserved for the operating system and contains the thread pointer used for thread-local storage (TLS) as mandated by the SPARC ABI. |