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authorJoel Sherrill <joel.sherrill@OARcorp.com>1999-10-11 19:03:05 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>1999-10-11 19:03:05 +0000
commit169502ea55d2c1d9ec9c2865c6302485bbaafc31 (patch)
tree5b253aae0732d83751d8ad94d21dd36e398fb86b /doc/user/intr.t
parentFixed variable reference for RTEMS-RELEASE. (diff)
downloadrtems-169502ea55d2c1d9ec9c2865c6302485bbaafc31.tar.bz2
Turned on concept and function name indexing.
Diffstat (limited to 'doc/user/intr.t')
-rw-r--r--doc/user/intr.t43
1 files changed, 37 insertions, 6 deletions
diff --git a/doc/user/intr.t b/doc/user/intr.t
index 6c4b946287..d4666327cb 100644
--- a/doc/user/intr.t
+++ b/doc/user/intr.t
@@ -31,6 +31,8 @@ directive:
@subsection Processing an Interrupt
+@cindex interrupt processing
+
The interrupt manager allows the application to
connect a function to a hardware interrupt vector. When an
interrupt occurs, the processor will automatically vector to
@@ -98,7 +100,6 @@ RTEMS directive.}
@end itemize
-
Consider a processor which allows a numerically low
interrupt level to interrupt a numerically greater interrupt
level. In this example, if an RTEMS directive is used in a
@@ -113,6 +114,8 @@ outermost ISR terminates will the postponed dispatching occur.
@subsection RTEMS Interrupt Levels
+@cindex interrupt levels
+
Many processors support multiple interrupt levels or
priorities. The exact number of interrupt levels is processor
dependent. RTEMS internally supports 256 interrupt levels which
@@ -124,6 +127,8 @@ target processor.
@subsection Disabling of Interrupts by RTEMS
+@cindex disabling interrupts
+
During the execution of directive calls, critical
sections of code may be executed. When these sections are
encountered, RTEMS disables all maskable interrupts before the
@@ -225,13 +230,19 @@ directives. A subsection is dedicated to each of this manager's
directives and describes the calling sequence, related
constants, usage, and status codes.
+@c
+@c
+@c
@page
@subsection INTERRUPT_CATCH - Establish an ISR
+@cindex establish an ISR
+@cindex install an ISR
+
@subheading CALLING SEQUENCE:
@ifset is-C
-@c @findex rtems_interrupt_catch
+@findex rtems_interrupt_catch
@example
rtems_status_code rtems_interrupt_catch(
rtems_isr_entry new_isr_handler,
@@ -277,13 +288,18 @@ will be ignored.
This directive will not cause the calling task to be preempted.
+@c
+@c
+@c
@page
@subsection INTERRUPT_DISABLE - Disable Interrupts
+@cindex disable interrupts
+
@subheading CALLING SEQUENCE:
@ifset is-C
-@c @findex rtems_interrupt_disable
+@findex rtems_interrupt_disable
@example
void rtems_interrupt_disable(
rtems_interrupt_level level
@@ -320,13 +336,18 @@ This directive will not cause the calling task to be preempted.
parameter.}
@end ifset
+@c
+@c
+@c
@page
@subsection INTERRUPT_ENABLE - Enable Interrupts
+@cindex enable interrupts
+
@subheading CALLING SEQUENCE:
@ifset is-C
-@c @findex rtems_interrupt_enable
+@findex rtems_interrupt_enable
@example
void rtems_interrupt_enable(
rtems_interrupt_level level
@@ -360,13 +381,18 @@ and will be enabled when this directive returns to the caller.
This directive will not cause the calling task to be preempted.
+@c
+@c
+@c
@page
@subsection INTERRUPT_FLASH - Flash Interrupts
+@cindex flash interrupts
+
@subheading CALLING SEQUENCE:
@ifset is-C
-@c @findex rtems_interrupt_flash
+@findex rtems_interrupt_flash
@example
void rtems_interrupt_flash(
rtems_interrupt_level level
@@ -399,13 +425,18 @@ and will be redisabled when this directive returns to the caller.
This directive will not cause the calling task to be preempted.
+@c
+@c
+@c
@page
@subsection INTERRUPT_IS_IN_PROGRESS - Is an ISR in Progress
+@cindex is interrupt in progress
+
@subheading CALLING SEQUENCE:
@ifset is-C
-@c @findex rtems_interrupt_is_in_progress
+@findex rtems_interrupt_is_in_progress
@example
rtems_boolean rtems_interrupt_is_in_progress( void );
@end example