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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1998-08-13 21:17:35 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1998-08-13 21:17:35 +0000 |
| commit | abb3c7557ef70796d6de1dac47b6f9a120103506 (patch) | |
| tree | 9b9ff6a7ca56a0b4393b697a532f143434a2777d /doc/supplements/powerpc/memmodel.texi | |
| parent | Added text to clarify the queueing of multiple events. (diff) | |
| download | rtems-abb3c7557ef70796d6de1dac47b6f9a120103506.tar.bz2 | |
Added DMV177 times files and made this all regenerate with two timing
chapters.
Diffstat (limited to 'doc/supplements/powerpc/memmodel.texi')
| -rw-r--r-- | doc/supplements/powerpc/memmodel.texi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/doc/supplements/powerpc/memmodel.texi b/doc/supplements/powerpc/memmodel.texi index 1e248d478e..2865c75e98 100644 --- a/doc/supplements/powerpc/memmodel.texi +++ b/doc/supplements/powerpc/memmodel.texi @@ -46,8 +46,8 @@ in the Block Address Translation (BAT) to convert these addresses. Implementations of the PowerPC architecture may be thirty-two or sixty-four bit. The PowerPC architecture supports a flat thirty-two or sixty-four bit address space with addresses ranging from 0x00000000 to 0xFFFFFFFF (4 -gigabytes) in thirty-two bit implementations or 0xFFFFFFFFFFFFFFFF -(XXX) in sixty-four bit implementations. Each address is represented +gigabytes) in thirty-two bit implementations or to 0xFFFFFFFFFFFFFFFF +in sixty-four bit implementations. Each address is represented by either a thirty-two bit or sixty-four bit value and is byte addressable. The address may be used to reference a single byte, half-word (2-bytes), word (4 bytes), or in sixty-four bit implementations a |