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authorJoel Sherrill <joel.sherrill@OARcorp.com>2002-07-31 00:16:04 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2002-07-31 00:16:04 +0000
commit52c5689ecd46a4601aea1104c1c860f8ca48ec05 (patch)
tree52850dfcb53e2cf9657368ed073de75b1de1f184 /doc/supplements/mips/intr_NOTIMES.t
parent2002-07-30 Joel Sherrill <joel@OARcorp.com> (diff)
downloadrtems-52c5689ecd46a4601aea1104c1c860f8ca48ec05.tar.bz2
2002-07-30 Joel Sherrill <joel@OARcorp.com>
* .cvsignore: Corrected some errors. * intr_NOTIMES.t, timeBSP.t: Replaced XXX's with real info.
Diffstat (limited to 'doc/supplements/mips/intr_NOTIMES.t')
-rw-r--r--doc/supplements/mips/intr_NOTIMES.t4
1 files changed, 2 insertions, 2 deletions
diff --git a/doc/supplements/mips/intr_NOTIMES.t b/doc/supplements/mips/intr_NOTIMES.t
index 04e4dff717..5b1025e873 100644
--- a/doc/supplements/mips/intr_NOTIMES.t
+++ b/doc/supplements/mips/intr_NOTIMES.t
@@ -167,7 +167,7 @@ the execution of this section and restores them to the previous
level upon completion of the section. RTEMS has been optimized
to insure that interrupts are disabled for less than
RTEMS_MAXIMUM_DISABLE_PERIOD microseconds on a
-RTEMS_MAXIMUM_DISABLE_PERIOD_MHZ Mhz XXX with
+RTEMS_MAXIMUM_DISABLE_PERIOD_MHZ Mhz processor with
zero wait states. These numbers will vary based the
number of wait states and processor speed present on the target board.
[NOTE: The maximum period with interrupts disabled is hand calculated. This
@@ -189,7 +189,7 @@ interrupt stack is determined by the interrupt_stack_size field
in the CPU Configuration Table. During the initialization
process, RTEMS will install its interrupt stack.
-The XXX port of RTEMS supports a software managed
+The mips port of RTEMS supports a software managed
dedicated interrupt stack on those CPU models which do not
support a separate interrupt stack in hardware.