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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2015-07-23 08:36:30 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2015-07-23 09:12:35 +0200 |
| commit | f9a597950b1d61c9c1283dc85ae2a4c579d96263 (patch) | |
| tree | 1db8bf1a057132a196b47b6263c9fea475fe16eb /doc/cpu_supplement/sparc.t | |
| parent | bsps/arm: Update due to API changes (diff) | |
| download | rtems-f9a597950b1d61c9c1283dc85ae2a4c579d96263.tar.bz2 | |
doc: Add SMP section to CPU Arch Supplement
Diffstat (limited to 'doc/cpu_supplement/sparc.t')
| -rw-r--r-- | doc/cpu_supplement/sparc.t | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/doc/cpu_supplement/sparc.t b/doc/cpu_supplement/sparc.t index 740643a4d3..749c1fd2de 100644 --- a/doc/cpu_supplement/sparc.t +++ b/doc/cpu_supplement/sparc.t @@ -969,6 +969,11 @@ error source in register @code{g2}, and the error code in register @code{g3}. It will then generate a system error which will hand over control to the debugger, simulator, etc. +@section Symmetric Multiprocessing + +SMP is supported. Available platforms are the Cobham Gaisler GR712RC and +GR740. + @section Thread-Local Storage Thread-local storage is supported. |