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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-01-28 12:10:08 +0100 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-02-04 10:06:35 +0100 |
commit | 022851aba54d32831feaff13deb3d9943e130eee (patch) | |
tree | c1d6a8404dae393bd147790f6a9cf09c2f327b5a /doc/cpu_supplement/sparc.t | |
parent | bsps: Thread-local storage (TLS) for linkcmds (diff) | |
download | rtems-022851aba54d32831feaff13deb3d9943e130eee.tar.bz2 |
Add thread-local storage (TLS) support
Tested and implemented on ARM, m68k, PowerPC and SPARC. Other
architectures need more work.
Diffstat (limited to 'doc/cpu_supplement/sparc.t')
-rw-r--r-- | doc/cpu_supplement/sparc.t | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/doc/cpu_supplement/sparc.t b/doc/cpu_supplement/sparc.t index 32f4321de6..616f79f5c2 100644 --- a/doc/cpu_supplement/sparc.t +++ b/doc/cpu_supplement/sparc.t @@ -917,6 +917,9 @@ default fatal error handler disables processor interrupts to level 15, places the error code in g1, and goes into an infinite loop to simulate a halt processor instruction. +@section Thread-Local Storage + +Thread-local storage is supported. @c @c COPYRIGHT (c) 1988-2002. |