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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2015-07-23 08:36:30 +0200 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2015-07-23 09:12:35 +0200 |
commit | f9a597950b1d61c9c1283dc85ae2a4c579d96263 (patch) | |
tree | 1db8bf1a057132a196b47b6263c9fea475fe16eb /doc/cpu_supplement/m68k.t | |
parent | bsps/arm: Update due to API changes (diff) | |
download | rtems-f9a597950b1d61c9c1283dc85ae2a4c579d96263.tar.bz2 |
doc: Add SMP section to CPU Arch Supplement
Diffstat (limited to 'doc/cpu_supplement/m68k.t')
-rw-r--r-- | doc/cpu_supplement/m68k.t | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/doc/cpu_supplement/m68k.t b/doc/cpu_supplement/m68k.t index a3ddc88db3..7201571541 100644 --- a/doc/cpu_supplement/m68k.t +++ b/doc/cpu_supplement/m68k.t @@ -357,6 +357,10 @@ The default fatal error handler for this architecture disables processor interrupts to level 7, places the error code in D0, and executes a @code{stop} instruction to simulate a halt processor instruction. +@section Symmetric Multiprocessing + +SMP is not supported. + @section Thread-Local Storage Thread-local storage is supported. |