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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2015-07-23 08:36:30 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2015-07-23 09:12:35 +0200 |
| commit | f9a597950b1d61c9c1283dc85ae2a4c579d96263 (patch) | |
| tree | 1db8bf1a057132a196b47b6263c9fea475fe16eb /doc/cpu_supplement/general.t | |
| parent | bsps/arm: Update due to API changes (diff) | |
| download | rtems-f9a597950b1d61c9c1283dc85ae2a4c579d96263.tar.bz2 | |
doc: Add SMP section to CPU Arch Supplement
Diffstat (limited to 'doc/cpu_supplement/general.t')
| -rw-r--r-- | doc/cpu_supplement/general.t | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/doc/cpu_supplement/general.t b/doc/cpu_supplement/general.t index 82b8dcbbd4..43f91e1d14 100644 --- a/doc/cpu_supplement/general.t +++ b/doc/cpu_supplement/general.t @@ -344,6 +344,11 @@ interrupts and halts the processor. In each of the architecture specific chapters, this describes the precise operations of the default CPU specific fatal error handler. +@section Symmetric Multiprocessing + +This section contains information about the Symmetric Multiprocessing (SMP) +status of a particular architecture. + @section Thread-Local Storage In order to support thread-local storage (TLS) the CPU port must implement the |