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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-12-15 15:22:18 +0100 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-12-16 11:34:47 +0100 |
commit | 48cfe6819e76c1405e6d13dcca319b7c76000a7b (patch) | |
tree | 0938e436bd50ca8353c7d4e4da5556379bef52c3 /doc/cpu_supplement/arm.t | |
parent | Delete CONFIGURE_USE_IMFS_AS_BASE_FILESYSTEM (diff) | |
download | rtems-48cfe6819e76c1405e6d13dcca319b7c76000a7b.tar.bz2 |
doc: Add multilib section to CPU supplement
Add multilib section for ARM and PowerPC
Diffstat (limited to 'doc/cpu_supplement/arm.t')
-rw-r--r-- | doc/cpu_supplement/arm.t | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/doc/cpu_supplement/arm.t b/doc/cpu_supplement/arm.t index 5dacbc0e73..012728cdb0 100644 --- a/doc/cpu_supplement/arm.t +++ b/doc/cpu_supplement/arm.t @@ -52,6 +52,63 @@ The following floating point units are supported. @end itemize +@c +@c +@c +@section Multilibs + +The following multilibs are available: + +@enumerate +@item @code{.}: ARMv4T, ARM instruction set +@item @code{thumb}: ARMv4T, Thumb-1 instruction set +@item @code{thumb/armv6-m}: ARMv6M, subset of Thumb-2 instruction set +@item @code{thumb/armv7-a}: ARMv7-A, Thumb-2 instruction set +@item @code{thumb/armv7-a/neon/hard}: ARMv7-A, Thumb-2 instruction set with +hard-float ABI Neon and VFP-D32 support +@item @code{thumb/armv7-r}: ARMv7-R, Thumb-2 instruction set +@item @code{thumb/armv7-r/vfpv3-d16/hard}: ARMv7-R, Thumb-2 instruction set +with hard-float ABI VFP-D16 support +@item @code{thumb/armv7-m}: ARMv7-M, Thumb-2 instruction set with hardware +integer division (SDIV/UDIV) +@item @code{thumb/armv7-m/fpv4-sp-d16}: ARMv7-M, Thumb-2 instruction set with +hardware integer division (SDIV/UDIV) and hard-float ABI FPv4-SP support +@item @code{eb/thumb/armv7-r}: ARMv7-R, Big-endian Thumb-2 instruction set +@item @code{eb/thumb/armv7-r/vfpv3-d16/hard}: ARMv7-R, Big-endian Thumb-2 +instruction set with hard-float ABI VFP-D16 support +@end enumerate + +Multilib 1. and 2. support the standard ARM7TDMI and ARM926EJ-S targets. + +Multilib 3. supports the Cortex-M0 and Cortex-M1 cores. + +Multilib 8. supports the Cortex-M3 and Cortex-M4 cores, which have a special +hardware integer division instruction (this is not present in the A and R +profiles). + +Multilib 9. supports the Cortex-M4 cores with a floating point unit. + +Multilib 4. and 5. support the Cortex-A processors. + +Multilib 6., 7., 10. and 11. support the Cortex-R processors. Here also +big-endian variants are available. + +Use for example the following GCC options + +@example +-mthumb -march=armv7-a -mfpu=neon -mfloat-abi=hard -mtune=cortex-a9 +@end example + +to build an application or BSP for the ARMv7-A architecture and tune the code +for a Cortex-A9 processor. It is important to select the options used for the +multilibs. For example + +@example +-mthumb -mcpu=cortex-a9 +@end example + +alone will not select the ARMv7-A multilib. + @section Calling Conventions Please refer to the |