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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2011-12-06 14:06:39 +0000 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2011-12-06 14:06:39 +0000 |
| commit | 7e0ef0f7b3b3cc17de3b44fcc2707a9eb9ffbef4 (patch) | |
| tree | dec64a610918896002f1f2806c19c7a1ad43e822 /cpukit | |
| parent | 2011-12-06 Sebastian Huber <sebastian.huber@embedded-brains.de> (diff) | |
| download | rtems-7e0ef0f7b3b3cc17de3b44fcc2707a9eb9ffbef4.tar.bz2 | |
2011-12-06 Sebastian Huber <sebastian.huber@embedded-brains.de>
* rtems/powerpc/registers.h: More register defines.
Diffstat (limited to 'cpukit')
| -rw-r--r-- | cpukit/score/cpu/powerpc/ChangeLog | 4 | ||||
| -rw-r--r-- | cpukit/score/cpu/powerpc/rtems/powerpc/registers.h | 35 |
2 files changed, 39 insertions, 0 deletions
diff --git a/cpukit/score/cpu/powerpc/ChangeLog b/cpukit/score/cpu/powerpc/ChangeLog index c7bd2a02dc..488212a24e 100644 --- a/cpukit/score/cpu/powerpc/ChangeLog +++ b/cpukit/score/cpu/powerpc/ChangeLog @@ -1,3 +1,7 @@ +2011-12-06 Sebastian Huber <sebastian.huber@embedded-brains.de> + + * rtems/powerpc/registers.h: More register defines. + 2011-09-27 Sebastian Huber <sebastian.huber@embedded-brains.de> PR 1914/cpukit diff --git a/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h b/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h index 7dc3d20c91..5ec4dd6161 100644 --- a/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h +++ b/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h @@ -322,7 +322,23 @@ lidate */ #define BOOKE_TCR_FPEXT_MASK (0xf<<13) #define BOOKE_PID 48 +#define BOOKE_ESR 62 +#define BOOKE_IVPR 63 #define BOOKE_PIR 286 +#define BOOKE_DBSR 304 +#define BOOKE_DBCR0 308 +#define BOOKE_DBCR1 309 +#define BOOKE_DBCR2 310 +#define BOOKE_DAC1 316 +#define BOOKE_DAC2 317 +#define BOOKE_DVC1 318 +#define BOOKE_DVC2 319 + +/* Freescale Book E Implementation Standards (EIS): Branch Operations */ + +#define FSL_EIS_BUCSR 1013 +#define FSL_EIS_BUCSR_BBFI (1 << (63 - 54)) +#define FSL_EIS_BUCSR_BPEN (1 << (63 - 63)) /* Freescale Book E Implementation Standards (EIS): Hardware Implementation-Dependent Registers */ @@ -418,10 +434,29 @@ lidate */ #define FSL_EIS_ATBL 526 #define FSL_EIS_ATBU 527 +/* Freescale Book E Implementation Standards (EIS): Interrupt */ + +#define FSL_EIS_MCAR 573 +#define FSL_EIS_DSRR0 574 +#define FSL_EIS_DSRR1 575 + /* Freescale Book E Implementation Standards (EIS): Signal Processing Engine (SPE) */ #define FSL_EIS_SPEFSCR 512 +/* Freescale Book E Implementation Standards (EIS): Software-Use SPRs */ + +#define FSL_EIS_SPRG8 604 +#define FSL_EIS_SPRG9 605 + +/* Freescale Book E Implementation Standards (EIS): Debug */ + +#define FSL_EIS_DBCR3 561 +#define FSL_EIS_DBCR4 563 +#define FSL_EIS_DBCR5 564 +#define FSL_EIS_DBCR6 603 +#define FSL_EIS_DBCNT 562 + /** * @brief Default value for the interrupt disable mask. * |