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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-06-24 15:21:46 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-11-18 14:56:43 +0100 |
| commit | 39a4574652f2f7bae2f18b4eb6f5f9bf788466a6 (patch) | |
| tree | bbe29cd999cf4e89d4e01f8cc983a9938d83a22a /cpukit | |
| parent | powerpc: Do not validate reserved XER bits (diff) | |
| download | rtems-39a4574652f2f7bae2f18b4eb6f5f9bf788466a6.tar.bz2 | |
powerpc: Add r2 to CPU context
The r2 may be used for thread-local storage.
Diffstat (limited to 'cpukit')
| -rw-r--r-- | cpukit/score/cpu/powerpc/cpu.c | 1 | ||||
| -rw-r--r-- | cpukit/score/cpu/powerpc/ppc-context-validate.S | 13 | ||||
| -rw-r--r-- | cpukit/score/cpu/powerpc/rtems/score/cpu.h | 10 |
3 files changed, 13 insertions, 11 deletions
diff --git a/cpukit/score/cpu/powerpc/cpu.c b/cpukit/score/cpu/powerpc/cpu.c index 1cac19c887..f88082efdd 100644 --- a/cpukit/score/cpu/powerpc/cpu.c +++ b/cpukit/score/cpu/powerpc/cpu.c @@ -51,6 +51,7 @@ PPC_ASSERT_OFFSET(gpr28, GPR28); PPC_ASSERT_OFFSET(gpr29, GPR29); PPC_ASSERT_OFFSET(gpr30, GPR30); PPC_ASSERT_OFFSET(gpr31, GPR31); +PPC_ASSERT_OFFSET(gpr2, GPR2); RTEMS_STATIC_ASSERT( sizeof(Context_Control) % PPC_DEFAULT_CACHE_LINE_SIZE == 0, diff --git a/cpukit/score/cpu/powerpc/ppc-context-validate.S b/cpukit/score/cpu/powerpc/ppc-context-validate.S index ecf84d6eb8..c7f16591ae 100644 --- a/cpukit/score/cpu/powerpc/ppc-context-validate.S +++ b/cpukit/score/cpu/powerpc/ppc-context-validate.S @@ -110,7 +110,9 @@ _CPU_Context_validate: addi r25, r3, 20 addi r26, r3, 21 addi r27, r3, 22 - addi r28, r3, 23 + + /* GPR28 contains the GPR2 pattern */ + xor r28, r2, r3 /* GPR29 and CR are equal most of the time */ addi r29, r3, 24 @@ -197,7 +199,7 @@ check: addi r4, r3, 22 cmpw r4, r27 bne restore - addi r4, r3, 23 + xor r4, r2, r3 cmpw r4, r28 bne restore addi r4, r3, 24 @@ -224,13 +226,6 @@ check: bne restore cmpw r31, r1 bne restore -#if 0 - /* This is only valid if we use the EABI */ - lis r4, _SDA2_BASE_@h - ori r4, r4, _SDA2_BASE_@l - cmpw r4, r2 - bne restore -#endif mtcr r29 addi r5, r3, 1 b check diff --git a/cpukit/score/cpu/powerpc/rtems/score/cpu.h b/cpukit/score/cpu/powerpc/rtems/score/cpu.h index 3d88d9d476..6263d34fb7 100644 --- a/cpukit/score/cpu/powerpc/rtems/score/cpu.h +++ b/cpukit/score/cpu/powerpc/rtems/score/cpu.h @@ -25,7 +25,7 @@ * * Copyright (c) 2001 Surrey Satellite Technology Limited (SSTL). * - * Copyright (c) 2010-2012 embedded brains GmbH. + * Copyright (c) 2010-2013 embedded brains GmbH. * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at @@ -273,7 +273,11 @@ typedef struct { /* There is no CPU specific per-CPU state */ } CPU_Per_CPU_control; -/* Non-volatile context according to E500ABIUG and EABI */ +/* + * Non-volatile context according to E500ABIUG, EABI and 32-bit TLS (according + * to "Power Architecture 32-bit Application Binary Interface Supplement 1.0 - + * Linux and Embedded") + */ typedef struct { uint32_t gpr1; uint32_t msr; @@ -297,6 +301,7 @@ typedef struct { PPC_GPR_TYPE gpr29; PPC_GPR_TYPE gpr30; PPC_GPR_TYPE gpr31; + uint32_t gpr2; #ifdef __ALTIVEC__ /* * 12 non-volatile vector registers, cache-aligned area for vscr/vrsave @@ -361,6 +366,7 @@ static inline ppc_context *ppc_get_context( Context_Control *context ) #define PPC_CONTEXT_OFFSET_GPR29 PPC_CONTEXT_GPR_OFFSET( 29 ) #define PPC_CONTEXT_OFFSET_GPR30 PPC_CONTEXT_GPR_OFFSET( 30 ) #define PPC_CONTEXT_OFFSET_GPR31 PPC_CONTEXT_GPR_OFFSET( 31 ) +#define PPC_CONTEXT_OFFSET_GPR2 PPC_CONTEXT_GPR_OFFSET( 32 ) #ifndef ASM typedef struct { |