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| author | Daniel Cederman <cederman@gaisler.com> | 2017-07-13 09:26:50 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2017-07-17 07:41:38 +0200 |
| commit | 2f8704b6c8c3ce65cdf2b589a98de1d1d9dc8ffa (patch) | |
| tree | bd540adf388432ec7db34e5d2c4a3d4b8574b344 /cpukit | |
| parent | psxtests: Add a mmap dedicated test case (diff) | |
| download | rtems-2f8704b6c8c3ce65cdf2b589a98de1d1d9dc8ffa.tar.bz2 | |
sparc: Add assembly workaround for LEON3FT B2BST errata
This patch adds NOP instructions to prevent instruction sequences
that are sensitive to the LEON3FT B2BST errata. See GRLIB-TN-0009:
"LEON3FT Stale Cache Entry After Store with Data Tag Parity Error"
for more information.
The sequences are only modified if __FIX_LEON3FT_B2BST is defined.
The patch works in conjunction with the -mfix-ut700, -mfix-gr712rc,
and -mfix-ut699 GCC flags that prevents the sensitive sequences from
being generated.
Update #3057.
Diffstat (limited to 'cpukit')
| -rw-r--r-- | cpukit/score/cpu/sparc/cpu_asm.S | 22 | ||||
| -rw-r--r-- | cpukit/score/cpu/sparc/rtems/score/sparc.h | 10 | ||||
| -rw-r--r-- | cpukit/score/cpu/sparc/sparc-context-validate.S | 1 |
3 files changed, 33 insertions, 0 deletions
diff --git a/cpukit/score/cpu/sparc/cpu_asm.S b/cpukit/score/cpu/sparc/cpu_asm.S index 4e683dae0d..399c95508b 100644 --- a/cpukit/score/cpu/sparc/cpu_asm.S +++ b/cpukit/score/cpu/sparc/cpu_asm.S @@ -46,23 +46,45 @@ SYM(_CPU_Context_save_fp): ld [%o0], %o1 std %f0, [%o1 + FO_F1_OFFSET] + SPARC_LEON3FT_B2BST_NOP std %f2, [%o1 + F2_F3_OFFSET] + SPARC_LEON3FT_B2BST_NOP std %f4, [%o1 + F4_F5_OFFSET] + SPARC_LEON3FT_B2BST_NOP std %f6, [%o1 + F6_F7_OFFSET] + SPARC_LEON3FT_B2BST_NOP std %f8, [%o1 + F8_F9_OFFSET] + SPARC_LEON3FT_B2BST_NOP std %f10, [%o1 + F1O_F11_OFFSET] + SPARC_LEON3FT_B2BST_NOP std %f12, [%o1 + F12_F13_OFFSET] + SPARC_LEON3FT_B2BST_NOP std %f14, [%o1 + F14_F15_OFFSET] + SPARC_LEON3FT_B2BST_NOP std %f16, [%o1 + F16_F17_OFFSET] + SPARC_LEON3FT_B2BST_NOP std %f18, [%o1 + F18_F19_OFFSET] + SPARC_LEON3FT_B2BST_NOP std %f20, [%o1 + F2O_F21_OFFSET] + SPARC_LEON3FT_B2BST_NOP std %f22, [%o1 + F22_F23_OFFSET] + SPARC_LEON3FT_B2BST_NOP std %f24, [%o1 + F24_F25_OFFSET] + SPARC_LEON3FT_B2BST_NOP std %f26, [%o1 + F26_F27_OFFSET] + SPARC_LEON3FT_B2BST_NOP std %f28, [%o1 + F28_F29_OFFSET] + SPARC_LEON3FT_B2BST_NOP std %f30, [%o1 + F3O_F31_OFFSET] + SPARC_LEON3FT_B2BST_NOP +#if defined(__FIX_LEON3FT_B2BST) + st %fsr, [%o1 + FSR_OFFSET] + jmp %o7 + 8 + nop +#else jmp %o7 + 8 st %fsr, [%o1 + FSR_OFFSET] +#endif /* * void _CPU_Context_restore_fp( diff --git a/cpukit/score/cpu/sparc/rtems/score/sparc.h b/cpukit/score/cpu/sparc/rtems/score/sparc.h index 5fe8b6ada7..747d013559 100644 --- a/cpukit/score/cpu/sparc/rtems/score/sparc.h +++ b/cpukit/score/cpu/sparc/rtems/score/sparc.h @@ -63,6 +63,16 @@ extern "C" { #define SPARC_NUMBER_OF_REGISTER_WINDOWS 8 /** + * See GRLIB-TN-0009: "LEON3FT Stale Cache Entry After Store with + * Data Tag Parity Error" + */ +#if defined(__FIX_LEON3FT_B2BST) + #define SPARC_LEON3FT_B2BST_NOP nop +#else + #define SPARC_LEON3FT_B2BST_NOP +#endif + +/** * This macro indicates whether this multilib variation has hardware * floating point or not. We use the gcc cpp predefine _SOFT_FLOAT * to determine that. diff --git a/cpukit/score/cpu/sparc/sparc-context-validate.S b/cpukit/score/cpu/sparc/sparc-context-validate.S index e0724e0e94..777f4dd8a6 100644 --- a/cpukit/score/cpu/sparc/sparc-context-validate.S +++ b/cpukit/score/cpu/sparc/sparc-context-validate.S @@ -282,6 +282,7 @@ y_checking: nop st %o1, [%sp + FRAME_OFFSET_BUFFER_2] + SPARC_LEON3FT_B2BST_NOP /* Check floating point registers */ check_float_register %f31 check_float_register %f30 |