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authorJoel Sherrill <joel.sherrill@OARcorp.com>2002-03-20 18:16:07 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2002-03-20 18:16:07 +0000
commit25d3d4d16c33905e5a2320698c1bba099efe1813 (patch)
tree5a0b71e5f02858851e90d46a2ad5ce4e9f8e291f /cpukit
parenteaeb467139ed6c7322cdf42dfb9698811e00d8d8 (diff)
downloadrtems-25d3d4d16c33905e5a2320698c1bba099efe1813.tar.bz2
2002-03-20 Greg Menke <gregory.menke@gsfc.nasa.gov>
* cpu_asm.S: Now compiles on 4600 and 4650.
Diffstat (limited to 'cpukit')
-rw-r--r--cpukit/score/cpu/mips/ChangeLog4
-rw-r--r--cpukit/score/cpu/mips/cpu_asm.S7
2 files changed, 11 insertions, 0 deletions
diff --git a/cpukit/score/cpu/mips/ChangeLog b/cpukit/score/cpu/mips/ChangeLog
index ddb8d5f32a..f37bcc2d9e 100644
--- a/cpukit/score/cpu/mips/ChangeLog
+++ b/cpukit/score/cpu/mips/ChangeLog
@@ -1,3 +1,7 @@
+2002-03-20 Greg Menke <gregory.menke@gsfc.nasa.gov>
+
+ * cpu_asm.S: Now compiles on 4600 and 4650.
+
2002-03-13 Greg Menke <gregory.menke@gsfc.nasa.gov>
* cpu_asm.S: Fixed a sneaky return from int w/ ints disabled bug.
diff --git a/cpukit/score/cpu/mips/cpu_asm.S b/cpukit/score/cpu/mips/cpu_asm.S
index 63796714c1..657c490d96 100644
--- a/cpukit/score/cpu/mips/cpu_asm.S
+++ b/cpukit/score/cpu/mips/cpu_asm.S
@@ -674,9 +674,16 @@ _ISR_Handler_Exception:
/* CP0 special registers */
+#if __mips == 1
MFC0 t0,C0_TAR
+#endif
MFC0 t1,C0_BADVADDR
+
+#if __mips == 1
STREG t0,R_TAR*R_SZ(sp)
+#else
+ NOP
+#endif
STREG t1,R_BADVADDR*R_SZ(sp)
#if ( CPU_HARDWARE_FP == TRUE )