* rtems/powerpc/registers.h: Added defines DEAR_BOOKE and DEAR_405.

        * rtems/score/cpu.h: Changed fpscr field to an integer type in
        Context_Control_fp.  Fixed warnings in PPC_Set_timebase_register().
        Changed _CPU_Context_Initialize_fp() to initialize all fields and
        avoid floating-point instructions.
        * rtems/score/powerpc.h: Removed PPC_INIT_FPSCR define.

4 files changed, 21 insertions, 16 deletions

diff --git a/cpukit/score/cpu/powerpc/ChangeLog b/cpukit/score/cpu/powerpc/ChangeLog
index f0eba118d4..16192b2ab0 100644
--- a/cpukit/score/cpu/powerpc/ChangeLog
+++ b/cpukit/score/cpu/powerpc/ChangeLog
@@ -1,3 +1,12 @@
+2009-10-21	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* rtems/powerpc/registers.h: Added defines DEAR_BOOKE and DEAR_405.
+	* rtems/score/cpu.h: Changed fpscr field to an integer type in
+	Context_Control_fp.  Fixed warnings in PPC_Set_timebase_register().
+	Changed _CPU_Context_Initialize_fp() to initialize all fields and
+	avoid floating-point instructions.
+	* rtems/score/powerpc.h: Removed PPC_INIT_FPSCR define.
+
 2009-02-27	Sebastian Huber <sebastian.huber@embedded-brains.de>
 
 	* rtems/powerpc/registers.h: Added Freescale Book E Implementation
diff --git a/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h b/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h
index 37260465af..6d6144a59b 100644
--- a/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h
+++ b/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h
@@ -169,6 +169,8 @@ n:
 #define RPA	982
 #define SDR1	25	/* MMU hash base register */
 #define DAR	19	/* Data Address Register */
+#define DEAR_BOOKE 61
+#define DEAR_405 981
 #define SPR0	272	/* Supervisor Private Registers */
 #define SPRG0   272
 #define SPR1	273
diff --git a/cpukit/score/cpu/powerpc/rtems/score/cpu.h b/cpukit/score/cpu/powerpc/rtems/score/cpu.h
index c1fbee965c..0d006c4a9d 100644
--- a/cpukit/score/cpu/powerpc/rtems/score/cpu.h
+++ b/cpukit/score/cpu/powerpc/rtems/score/cpu.h
@@ -17,8 +17,10 @@
 #define _RTEMS_SCORE_CPU_H
 
 #include <rtems/score/powerpc.h>              /* pick up machine definitions */
+
 #ifndef ASM
-#include <rtems/score/types.h>
+  #include <string.h> /* for memset() */
+  #include <rtems/score/types.h>
 #endif
 
 /* conditional compilation parameters */
@@ -224,6 +226,7 @@
  */
 
 #ifndef ASM
+
 typedef struct {
     uint32_t   gpr1;	/* Stack pointer for all */
     uint32_t   gpr2;	/* Reserved SVR4, section ptr EABI + */
@@ -263,15 +266,13 @@ typedef struct {
      */
 #if (PPC_HAS_DOUBLE == 1)
     double	f[32];
-    double	fpscr;
+    uint64_t	fpscr;
 #else
     float	f[32];
-    float	fpscr;
+    uint32_t	fpscr;
 #endif
 } Context_Control_fp;
-#endif /* ASM */
 
-#ifndef ASM
 typedef struct CPU_Interrupt_frame {
     uint32_t   stacklink;	/* Ensure this is a real frame (also reg1 save) */
     uint32_t   calleeLr;	/* link register used by callees: SVR4/EABI */
@@ -302,6 +303,7 @@ typedef struct CPU_Interrupt_frame {
     uint32_t   msr;
     uint32_t   pad[3];
 } CPU_Interrupt_frame;
+
 #endif /* ASM */
 
 #include <rtems/new-exceptions/cpu.h>
@@ -499,8 +501,8 @@ static inline  void PPC_Set_timebase_register (uint64_t tbr)
   uint32_t tbr_low;
   uint32_t tbr_high;
 
-  tbr_low = (tbr & 0xffffffff) ;
-  tbr_high = (tbr >> 32) & 0xffffffff;
+  tbr_low = (uint32_t) tbr;
+  tbr_high = (uint32_t) (tbr >> 32);
   asm volatile( "mtspr 284, %0" : : "r" (tbr_low));
   asm volatile( "mtspr 285, %0" : : "r" (tbr_high));
   
@@ -578,9 +580,7 @@ void _CPU_Context_Initialize(
  */
 
 #define _CPU_Context_Initialize_fp( _destination ) \
-  { \
-    (*(_destination))->fpscr = PPC_INIT_FPSCR; \
-  }
+  memset( *(_destination), 0, sizeof( **(_destination) ) )
 
 /* end of Context handler macros */
 #endif /* ASM */
diff --git a/cpukit/score/cpu/powerpc/rtems/score/powerpc.h b/cpukit/score/cpu/powerpc/rtems/score/powerpc.h
index a67059d1ba..efe7666c42 100644
--- a/cpukit/score/cpu/powerpc/rtems/score/powerpc.h
+++ b/cpukit/score/cpu/powerpc/rtems/score/powerpc.h
@@ -142,12 +142,6 @@ extern "C" {
 #endif
 
 /*
- *  Initial value for the FPSCR register
- */
-
-#define PPC_INIT_FPSCR		0x000000f8
-
-/*
  *  Assemblers.
  *  PPC_ASM MUST be defined as one of these.
  *