diff options
| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2007-05-31 16:55:37 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2007-05-31 16:55:37 +0000 |
| commit | 008171099d817f4745ab55a68121d5dba7b66181 (patch) | |
| tree | 6de0482eede40dac7e4904898da3d0ae6d2f46e9 /cpukit | |
| parent | 2007-05-29 Joel Sherrill <joel.sherrill@OARcorp.com> (diff) | |
| download | rtems-008171099d817f4745ab55a68121d5dba7b66181.tar.bz2 | |
2007-05-31 Alain Schaefer <alani@easc.ch>
* rtems/score/cpu.h: Modifiy inline assembly language
constraints to use a data register as the CTL/STI
instructions requires. This is not only more correct,
it avoids GCC PR31787.
Diffstat (limited to 'cpukit')
| -rw-r--r-- | cpukit/score/cpu/bfin/ChangeLog | 7 | ||||
| -rw-r--r-- | cpukit/score/cpu/bfin/rtems/score/cpu.h | 10 |
2 files changed, 12 insertions, 5 deletions
diff --git a/cpukit/score/cpu/bfin/ChangeLog b/cpukit/score/cpu/bfin/ChangeLog index 5869fa2cc7..2584deb2b7 100644 --- a/cpukit/score/cpu/bfin/ChangeLog +++ b/cpukit/score/cpu/bfin/ChangeLog @@ -1,3 +1,10 @@ +2007-05-31 Alain Schaefer <alani@easc.ch> + + * rtems/score/cpu.h: Modifiy inline assembly language + constraints to use a data register as the CTL/STI + instructions requires. This is not only more correct, + it avoids GCC PR31787. + 2007-05-24 Alain Schaefer <alani@easc.ch> * rtems/score/cpu.h: Fix incorrect interrupt mask. diff --git a/cpukit/score/cpu/bfin/rtems/score/cpu.h b/cpukit/score/cpu/bfin/rtems/score/cpu.h index db3ff20617..0d4bbeb5b7 100644 --- a/cpukit/score/cpu/bfin/rtems/score/cpu.h +++ b/cpukit/score/cpu/bfin/rtems/score/cpu.h @@ -846,8 +846,8 @@ SCORE_EXTERN void (*_CPU_Thread_dispatch_pointer)(); */ #define _CPU_ISR_Disable( _level ) \ { \ - asm volatile ("cli %0 \n" \ - : "=r" (_level) ); \ + asm volatile ("cli %0 \n" \ + : "=d" (_level) ); \ \ } @@ -865,9 +865,9 @@ SCORE_EXTERN void (*_CPU_Thread_dispatch_pointer)(); * XXX document implementation including references if appropriate */ #define _CPU_ISR_Enable( _level ) \ - { \ - asm volatile ("STI %0" \ - : : "r" (_level) ); \ + { \ + asm volatile ("STI %0 \n" \ + : : "d" (_level) ); \ } /** |