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authorAndreas Dachsberger <andreas.dachsberger@embedded-brains.de>2019-03-27 11:11:54 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2019-04-02 07:29:31 +0200
commit9f8af67ff180ff9c2833989640f0f7f372bbcf0f (patch)
treec2b16b920bfccc707516bae60d23e62fd0ee00ba /cpukit/score
parentdoxygen: score: Add SPARC64 CPU architecture group (diff)
downloadrtems-9f8af67ff180ff9c2833989640f0f7f372bbcf0f.tar.bz2
doxygen: score: Add V850 CPU architecture group
Update #3706.
Diffstat (limited to 'cpukit/score')
-rw-r--r--cpukit/score/cpu/v850/include/rtems/asm.h12
-rw-r--r--cpukit/score/cpu/v850/include/rtems/score/cpu.h48
-rw-r--r--cpukit/score/cpu/v850/include/rtems/score/cpuimpl.h12
3 files changed, 54 insertions, 18 deletions
diff --git a/cpukit/score/cpu/v850/include/rtems/asm.h b/cpukit/score/cpu/v850/include/rtems/asm.h
index 265e4967ae..d9c21e1ea9 100644
--- a/cpukit/score/cpu/v850/include/rtems/asm.h
+++ b/cpukit/score/cpu/v850/include/rtems/asm.h
@@ -39,6 +39,16 @@
#include <rtems/score/cpuopts.h>
#include <rtems/score/no_cpu.h>
+/**
+ * @defgroup RTEMSScoreCPUV850ASM V850 Assembler Support
+ *
+ * @ingroup RTEMSScoreCPUV850
+ *
+ * @brief V850 Assembler Support
+ *
+ * @{
+ */
+
#ifndef __USER_LABEL_PREFIX__
/**
* Recent versions of GNU cpp define variables which indicate the
@@ -125,3 +135,5 @@
#define EXTERN(sym) .globl SYM (sym)
#endif
+
+/** @} */
diff --git a/cpukit/score/cpu/v850/include/rtems/score/cpu.h b/cpukit/score/cpu/v850/include/rtems/score/cpu.h
index 7011366ffb..0ce838806e 100644
--- a/cpukit/score/cpu/v850/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/v850/include/rtems/score/cpu.h
@@ -183,7 +183,7 @@ extern "C" {
#define CPU_STRUCTURE_ALIGNMENT
/**
- * @ingroup CPUInterrupt
+ * @addtogroup RTEMSScoreCPUV850CPUInterrupt
* The following defines the number of bits actually used in the
* interrupt field of the task mode. How those bits map to the
* CPU interrupt levels is defined by the routine @ref _CPU_ISR_Set_level.
@@ -197,7 +197,9 @@ extern "C" {
#define CPU_MAXIMUM_PROCESSORS 32
/**
- * @defgroup CPUContext Processor Dependent Context Management
+ * @defgroup RTEMSScoreCPUV850CPUContext Processor Dependent Context Management
+ *
+ * @ingroup RTEMSScoreCPUV850
*
* From the highest level viewpoint, there are 2 types of context to save.
*
@@ -238,7 +240,7 @@ extern "C" {
* On the v850, this port saves special registers and those that are
* callee saved.
*/
-/**@{**/
+/** @{ **/
/**
* This defines the minimal set of integer and processor state registers
@@ -295,15 +297,7 @@ typedef struct {
uint32_t special_interrupt_register;
} CPU_Interrupt_frame;
-/** @} */
-
/**
- * @defgroup CPUInterrupt Processor Dependent Interrupt Management
- */
-/**@{**/
-
-/**
- * @ingroup CPUContext
* The size of the floating point context area. On some CPUs this
* will not be a "sizeof" because the format of the floating point
* area is not defined -- only the size is. This is usually on
@@ -317,6 +311,15 @@ typedef struct {
/* #define CPU_CONTEXT_FP_SIZE sizeof( Context_Control_fp ) */
#define CPU_CONTEXT_FP_SIZE 0
+/** @} */
+
+/**
+ * @defgroup RTEMSScoreCPUV850CPUInterrupt Processor Dependent Interrupt Management
+ *
+ * @ingroup RTEMSScoreCPUV850
+ */
+/** @{ **/
+
/**
* Amount of extra stack (above minimum stack size) required by
* MPCI receive server thread. Remember that in a multiprocessor
@@ -338,7 +341,7 @@ typedef struct {
/** @} */
/**
- * @ingroup CPUContext
+ * @addtogroup RTEMSScoreCPUV850CPUContext
* Should be large enough to run all RTEMS tests. This ensures
* that a "reasonable" small application should not have any problems.
*
@@ -408,9 +411,9 @@ typedef struct {
*/
/**
- * @addtogroup CPUInterrupt
+ * @addtogroup RTEMSScoreCPUV850CPUInterrupt
*/
-/**@{**/
+/** @{ **/
/**
* Disable all interrupts for an RTEMS critical section. The previous
@@ -516,7 +519,7 @@ uint32_t _CPU_ISR_Get_level( void );
/* Context handler macros */
/**
- * @ingroup CPUContext
+ * @addtogroup RTEMSScoreCPUV850CPUContext
* Initialize the context to a state suitable for starting a
* task after a context restore operation. Generally, this
* involves:
@@ -641,7 +644,7 @@ void _CPU_Initialize(void);
void *_CPU_Thread_Idle_body( uintptr_t ignored );
/**
- * @addtogroup CPUContext
+ * @addtogroup RTEMSScoreCPUV850CPUContext
*/
/**@{**/
@@ -724,7 +727,15 @@ typedef CPU_Interrupt_frame CPU_Exception_frame;
void _CPU_Exception_frame_print( const CPU_Exception_frame *frame );
/**
- * @ingroup CPUEndian
+ * @defgroup RTEMSScoreCPUV850CPUEndian CPUEndian
+ *
+ * @ingroup RTEMSScoreCPUV850
+ *
+ * @brief CPUEndian
+ */
+/** @{ */
+
+/**
* The following routine swaps the endian format of an unsigned int.
* It must be static because it is referenced indirectly.
*
@@ -776,7 +787,6 @@ static inline uint32_t CPU_swap_u32(
}
/**
- * @ingroup CPUEndian
* This routine swaps a 16 bir quantity.
*
* @param[in] value is the value to be swapped
@@ -801,6 +811,8 @@ static inline uint16_t CPU_swap_u16( uint16_t value )
return swapped;
}
+/** @} */
+
typedef uint32_t CPU_Counter_ticks;
uint32_t _CPU_Counter_frequency( void );
diff --git a/cpukit/score/cpu/v850/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/v850/include/rtems/score/cpuimpl.h
index 78b87ef981..f7b02ccb6b 100644
--- a/cpukit/score/cpu/v850/include/rtems/score/cpuimpl.h
+++ b/cpukit/score/cpu/v850/include/rtems/score/cpuimpl.h
@@ -17,6 +17,16 @@
#include <rtems/score/cpu.h>
+/**
+ * @defgroup RTEMSScoreCPUV850 V850
+ *
+ * @ingroup RTEMSScoreCPU
+ *
+ * @brief V850 Architecture Support
+ *
+ * @{
+ */
+
#define CPU_PER_CPU_CONTROL_SIZE 0
#ifndef ASM
@@ -53,4 +63,6 @@ RTEMS_INLINE_ROUTINE void _CPU_Instruction_no_operation( void )
#endif /* ASM */
+/** @} */
+
#endif /* _RTEMS_SCORE_CPUIMPL_H */