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authorRalf Corsepius <ralf.corsepius@rtems.org>2004-04-14 12:02:06 +0000
committerRalf Corsepius <ralf.corsepius@rtems.org>2004-04-14 12:02:06 +0000
commit78d4816b49aee64c16206826f707557f05c18edb (patch)
treed77d9958bd0421191b8b3a7bff3092c21cf9ea52 /cpukit/score
parent6f2aebe171a7eac9688df375747bda7e3923f217 (diff)
downloadrtems-78d4816b49aee64c16206826f707557f05c18edb.tar.bz2
2004-04-14 Ralf Corsepius <ralf_corsepius@rtems.org>
PR 605/bsps * cpu.c: Remove further c++ style comments having been missed in previous patch. Remove printf's entirely.
Diffstat (limited to 'cpukit/score')
-rw-r--r--cpukit/score/cpu/mips/ChangeLog6
-rw-r--r--cpukit/score/cpu/mips/cpu.c5
2 files changed, 6 insertions, 5 deletions
diff --git a/cpukit/score/cpu/mips/ChangeLog b/cpukit/score/cpu/mips/ChangeLog
index e4a3ada22a..b9a3b1954e 100644
--- a/cpukit/score/cpu/mips/ChangeLog
+++ b/cpukit/score/cpu/mips/ChangeLog
@@ -1,3 +1,9 @@
+2004-04-14 Ralf Corsepius <ralf_corsepius@rtems.org>
+
+ PR 605/bsps
+ * cpu.c: Remove further c++ style comments having been missed in
+ previous patch. Remove printf's entirely.
+
2004-04-09 Joel Sherrill <joel@OARcorp.com>
PR 605/bsps
diff --git a/cpukit/score/cpu/mips/cpu.c b/cpukit/score/cpu/mips/cpu.c
index 2c601c693d..c84b738cf2 100644
--- a/cpukit/score/cpu/mips/cpu.c
+++ b/cpukit/score/cpu/mips/cpu.c
@@ -99,8 +99,6 @@ uint32_t _CPU_ISR_Get_level( void )
mips_get_sr(sr);
- /* printf("current sr=%08X, ",sr); */
-
#if __mips == 3
/* EXL bit and shift down hardware ints into bits 1 thru 6 */
sr = ((sr & SR_EXL) >> 1) | ((sr & 0xfc00) >> 9);
@@ -112,7 +110,6 @@ uint32_t _CPU_ISR_Get_level( void )
#else
#error "CPU ISR level: unknown MIPS level for SR handling"
#endif
- /* printf("intlevel=%02X\n",sr); */
return sr;
}
@@ -159,10 +156,8 @@ void _CPU_ISR_Set_level( uint32_t new_level )
#elif __mips == 1
mips_set_sr( (sr & ~SR_IEC) );
srbits = sr & ~(0xfc00 | SR_IEC);
- //printf("current sr=%08X, newlevel=%02X, srbits=%08X, ",sr,new_level,srbits);
sr = srbits | ((new_level==0)?0xfc01:( ((new_level<<9) & 0xfc00) | \
(new_level & SR_IEC)));
- //printf("new sr=%08X\n",sr);
#else
#error "CPU ISR level: unknown MIPS level for SR handling"
#endif