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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2016-11-10 12:02:28 +0100 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2016-11-23 12:52:06 +0100 |
commit | 84e6f15c828869eb7d293096cfcfa0563b5752b3 (patch) | |
tree | efafb1ab17f6d1a612f79b6ec8d821ad9123756c /cpukit/score/src/threaddispatch.c | |
parent | smptests/smplock01: Test TAS and TTAS locks (diff) | |
download | rtems-84e6f15c828869eb7d293096cfcfa0563b5752b3.tar.bz2 |
score: Robust thread dispatch
On SMP configurations, it is a fatal error to call blocking operating
system with interrupts disabled, since this prevents delivery of
inter-processor interrupts. This could lead to executing threads which
are not allowed to execute resulting in undefined behaviour.
The ARM Cortex-M port has a similar problem, since the interrupt state
is not a part of the thread context.
Update #2811.
Diffstat (limited to 'cpukit/score/src/threaddispatch.c')
-rw-r--r-- | cpukit/score/src/threaddispatch.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/cpukit/score/src/threaddispatch.c b/cpukit/score/src/threaddispatch.c index f2c24905dc..4f89475578 100644 --- a/cpukit/score/src/threaddispatch.c +++ b/cpukit/score/src/threaddispatch.c @@ -147,6 +147,21 @@ void _Thread_Do_dispatch( Per_CPU_Control *cpu_self, ISR_Level level ) _Assert( cpu_self->thread_dispatch_disable_level == 1 ); +#if defined(RTEMS_SCORE_ROBUST_THREAD_DISPATCH) + if ( + !_ISR_Is_enabled( level ) +#if defined(RTEMS_SMP) + && rtems_configuration_is_smp_enabled() +#endif + ) { + _Terminate( + INTERNAL_ERROR_CORE, + false, + INTERNAL_ERROR_BAD_THREAD_DISPATCH_ENVIRONMENT + ); + } +#endif + executing = cpu_self->executing; do { |