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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-07-26 16:26:07 +0200 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-07-30 09:53:24 +0200 |
commit | 21ff802c7f77dee09144b0a249fc0dc5d6ae0e2c (patch) | |
tree | 999a23d683c63197ea5ab48c1be1378dfff560a5 /cpukit/score/src/isrsmp.c | |
parent | smp: Delete _ISR_SMP_Initialize() (diff) | |
download | rtems-21ff802c7f77dee09144b0a249fc0dc5d6ae0e2c.tar.bz2 |
smp: Delete _ISR_Disable_on_this_core(), etc.
Delete _ISR_Enable_on_this_core(), _ISR_Flash_on_this_core(),
_ISR_SMP_Disable(), _ISR_SMP_Enable(), _ISR_SMP_Flash().
The ISR disable/enable interface has no parameter to pass a specific
object. Thus it is only possible to implement a single global lock
object with this interface. Using the ISR disable/enable as the giant
lock on SMP configurations is not feasible.
Potentially blocking resource obtain sequences protected by the thread
dispatch disable level are subdivided into smaller ISR disabled critical
sections. This works since on single processor configurations there is
only one thread of execution that can block. On SMP this is different
(image a mutex obtained concurrently by different threads on different
processors).
The thread dispatch disable level is currently used as the giant lock.
There is not need to complicate things with this unused interface.
Diffstat (limited to 'cpukit/score/src/isrsmp.c')
-rw-r--r-- | cpukit/score/src/isrsmp.c | 28 |
1 files changed, 4 insertions, 24 deletions
diff --git a/cpukit/score/src/isrsmp.c b/cpukit/score/src/isrsmp.c index 6ab815e4b7..c743f92fd9 100644 --- a/cpukit/score/src/isrsmp.c +++ b/cpukit/score/src/isrsmp.c @@ -24,33 +24,13 @@ #include <rtems/score/threaddispatch.h> #include <rtems/score/smp.h> -ISR_Level _ISR_SMP_Disable(void) -{ - ISR_Level level; - - _ISR_Disable_on_this_core( level ); - return level; -} - -void _ISR_SMP_Enable(ISR_Level level) -{ - _ISR_Enable_on_this_core( level ); -} - -void _ISR_SMP_Flash(ISR_Level level) -{ - ISR_Level ignored; - - _ISR_SMP_Enable( level ); - ignored = _ISR_SMP_Disable(); -} - int _ISR_SMP_Enter(void) { uint32_t isr_nest_level; ISR_Level level; - _ISR_Disable_on_this_core( level ); + /* FIXME: Where is the corresponding _ISR_Enable()? */ + _ISR_Disable( level ); isr_nest_level = _ISR_Nest_level++; @@ -66,7 +46,7 @@ int _ISR_SMP_Exit(void) retval = 0; - _ISR_Disable_on_this_core( level ); + _ISR_Disable( level ); _ISR_Nest_level--; @@ -88,7 +68,7 @@ int _ISR_SMP_Exit(void) retval = 0; #endif - _ISR_Enable_on_this_core( level ); + _ISR_Enable( level ); _Thread_Dispatch_decrement_disable_level(); |