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authorJoel Sherrill <joel.sherrill@OARcorp.com>2000-07-26 19:26:28 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2000-07-26 19:26:28 +0000
commit17508d02bba1d47f4cf884b190566e72f69adb4e (patch)
treea1b8738fd54754c0210ac709a4b650bc7d3c4538 /cpukit/score/inline/rtems/score/address.inl
parentPatch rtems-rc-20000713-1-cvs.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de> (diff)
downloadrtems-17508d02bba1d47f4cf884b190566e72f69adb4e.tar.bz2
Port of RTEMS to the Texas Instruments C3x/C4x DSP families including
a BSP (c4xsim) supporting the simulator included with gdb. This port was done by Joel Sherrill and Jennifer Averett of OAR Corporation. Also included with this port is a space/time optimization to eliminate FP context switch management on CPUs without hardware or software FP. An issue with this port was that sizeof(unsigned32) = sizeof(unsigned8) on this CPU. This required addressing alignment checks and assumptions as well as fixing code that assumed sizeof(unsigned32) == 4.
Diffstat (limited to 'cpukit/score/inline/rtems/score/address.inl')
-rw-r--r--cpukit/score/inline/rtems/score/address.inl4
1 files changed, 3 insertions, 1 deletions
diff --git a/cpukit/score/inline/rtems/score/address.inl b/cpukit/score/inline/rtems/score/address.inl
index b9a0373aff..54f11c3ca4 100644
--- a/cpukit/score/inline/rtems/score/address.inl
+++ b/cpukit/score/inline/rtems/score/address.inl
@@ -90,7 +90,9 @@ RTEMS_INLINE_ROUTINE boolean _Addresses_Is_aligned (
void *address
)
{
-#if defined(RTEMS_CPU_HAS_16_BIT_ADDRESSES)
+#if (CPU_ALIGNMENT == 0)
+ return TRUE;
+#elif defined(RTEMS_CPU_HAS_16_BIT_ADDRESSES)
return ( ( (unsigned short)address % CPU_ALIGNMENT ) == 0 );
#else
return ( ( (unsigned32)address % CPU_ALIGNMENT ) == 0 );