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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-03-18 11:56:42 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-03-19 08:34:27 +0100 |
| commit | a3dd225b88eaadc2832cdb65ee9287f8aceea095 (patch) | |
| tree | dbe6b3cd250722d6f6ed9259cf95f1190e5c3b38 /cpukit/score/include | |
| parent | score: Delete _Assert_Thread_dispatching_repressed (diff) | |
| download | rtems-a3dd225b88eaadc2832cdb65ee9287f8aceea095.tar.bz2 | |
score: Delete _Assert_Owner_of_giant()
Add _Debug_Is_owner_of_giant(). This makes it possible to assert the
opposite.
Diffstat (limited to 'cpukit/score/include')
| -rw-r--r-- | cpukit/score/include/rtems/score/assert.h | 12 | ||||
| -rw-r--r-- | cpukit/score/include/rtems/score/isrlevel.h | 6 |
2 files changed, 10 insertions, 8 deletions
diff --git a/cpukit/score/include/rtems/score/assert.h b/cpukit/score/include/rtems/score/assert.h index 0248b3c4e5..707222b6d3 100644 --- a/cpukit/score/include/rtems/score/assert.h +++ b/cpukit/score/include/rtems/score/assert.h @@ -49,12 +49,14 @@ extern "C" { #endif /** - * @brief Asserts that current thread of execution owns the giant lock. + * @brief Returns true if the current thread of execution owns the giant lock. */ -#if defined( RTEMS_DEBUG ) && defined( RTEMS_SMP ) - void _Assert_Owner_of_giant( void ); -#else - #define _Assert_Owner_of_giant() ( ( void ) 0 ) +#if defined( RTEMS_DEBUG ) + #if defined( RTEMS_SMP ) + bool _Debug_Is_owner_of_giant( void ); + #else + #define _Debug_Is_owner_of_giant() (true) + #endif #endif #ifdef __cplusplus diff --git a/cpukit/score/include/rtems/score/isrlevel.h b/cpukit/score/include/rtems/score/isrlevel.h index 94d1e917b5..a7a9b2e78c 100644 --- a/cpukit/score/include/rtems/score/isrlevel.h +++ b/cpukit/score/include/rtems/score/isrlevel.h @@ -58,7 +58,7 @@ typedef uint32_t ISR_Level; #define _ISR_Disable( _level ) \ do { \ _CPU_ISR_Disable( _level ); \ - _Assert_Owner_of_giant(); \ + _Assert( _Debug_Is_owner_of_giant() ); \ RTEMS_COMPILER_MEMORY_BARRIER(); \ } while (0) @@ -76,7 +76,7 @@ typedef uint32_t ISR_Level; #define _ISR_Enable( _level ) \ do { \ RTEMS_COMPILER_MEMORY_BARRIER(); \ - _Assert_Owner_of_giant(); \ + _Assert( _Debug_Is_owner_of_giant() ); \ _CPU_ISR_Enable( _level ); \ } while (0) @@ -102,7 +102,7 @@ typedef uint32_t ISR_Level; #define _ISR_Flash( _level ) \ do { \ RTEMS_COMPILER_MEMORY_BARRIER(); \ - _Assert_Owner_of_giant(); \ + _Assert( _Debug_Is_owner_of_giant() ); \ _CPU_ISR_Flash( _level ); \ RTEMS_COMPILER_MEMORY_BARRIER(); \ } while (0) |