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authorSebastian Huber <sebastian.huber@embedded-brains.de>2016-11-11 14:37:51 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2016-11-18 07:30:34 +0100
commitd5e073cde70211b2471e4366be397370e9f6ce48 (patch)
tree7ee1e3cad3dd7dfbb52475af7bacc61b216dc0e5 /cpukit/score/include/rtems/score/userextimpl.h
parentscore: Add Per_CPU_Control::Interrupt_frame (diff)
downloadrtems-d5e073cde70211b2471e4366be397370e9f6ce48.tar.bz2
score: Allow interrupts during thread dispatch
Use a processor-specific interrupt frame during context switches in case the executing thread is longer executes on the processor and the heir thread is about to start execution. During this period we must not use a thread stack for interrupt processing. Update #2809.
Diffstat (limited to 'cpukit/score/include/rtems/score/userextimpl.h')
-rw-r--r--cpukit/score/include/rtems/score/userextimpl.h13
1 files changed, 12 insertions, 1 deletions
diff --git a/cpukit/score/include/rtems/score/userextimpl.h b/cpukit/score/include/rtems/score/userextimpl.h
index e175c9f0a5..e6692c8749 100644
--- a/cpukit/score/include/rtems/score/userextimpl.h
+++ b/cpukit/score/include/rtems/score/userextimpl.h
@@ -261,8 +261,16 @@ static inline void _User_extensions_Thread_switch(
const Chain_Node *node = _Chain_Immutable_first( chain );
if ( node != tail ) {
- Per_CPU_Control *cpu_self = _Per_CPU_Get();
+ Per_CPU_Control *cpu_self;
+#if defined(RTEMS_SMP)
+ ISR_Level level;
+#endif
+
+ cpu_self = _Per_CPU_Get();
+#if defined(RTEMS_SMP)
+ _ISR_Local_disable( level );
+#endif
_Per_CPU_Acquire( cpu_self );
while ( node != tail ) {
@@ -275,6 +283,9 @@ static inline void _User_extensions_Thread_switch(
}
_Per_CPU_Release( cpu_self );
+#if defined(RTEMS_SMP)
+ _ISR_Local_enable( level );
+#endif
}
}