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authorSebastian Huber <sebastian.huber@embedded-brains.de>2016-11-10 12:02:28 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2016-11-23 12:52:06 +0100
commit84e6f15c828869eb7d293096cfcfa0563b5752b3 (patch)
treeefafb1ab17f6d1a612f79b6ec8d821ad9123756c /cpukit/score/include/rtems/score/threaddispatch.h
parentsmptests/smplock01: Test TAS and TTAS locks (diff)
downloadrtems-84e6f15c828869eb7d293096cfcfa0563b5752b3.tar.bz2
score: Robust thread dispatch
On SMP configurations, it is a fatal error to call blocking operating system with interrupts disabled, since this prevents delivery of inter-processor interrupts. This could lead to executing threads which are not allowed to execute resulting in undefined behaviour. The ARM Cortex-M port has a similar problem, since the interrupt state is not a part of the thread context. Update #2811.
Diffstat (limited to 'cpukit/score/include/rtems/score/threaddispatch.h')
-rw-r--r--cpukit/score/include/rtems/score/threaddispatch.h19
1 files changed, 18 insertions, 1 deletions
diff --git a/cpukit/score/include/rtems/score/threaddispatch.h b/cpukit/score/include/rtems/score/threaddispatch.h
index f4ca096783..0238f8f5d5 100644
--- a/cpukit/score/include/rtems/score/threaddispatch.h
+++ b/cpukit/score/include/rtems/score/threaddispatch.h
@@ -28,6 +28,18 @@ extern "C" {
* @{
*/
+#if defined(RTEMS_SMP) || ( CPU_ENABLE_ROBUST_THREAD_DISPATCH == TRUE )
+/**
+ * @brief Enables a robust thread dispatch.
+ *
+ * On each change of the thread dispatch disable level from one to zero the
+ * interrupt status is checked. In case interrupts are disabled and SMP is
+ * enabled or the CPU port needs it, then the system terminates with the fatal
+ * internal error INTERNAL_ERROR_BAD_THREAD_DISPATCH_ENVIRONMENT.
+ */
+#define RTEMS_SCORE_ROBUST_THREAD_DISPATCH
+#endif
+
/**
* @brief Indicates if the executing thread is inside a thread dispatch
* critical section.
@@ -206,7 +218,12 @@ RTEMS_INLINE_ROUTINE void _Thread_Dispatch_enable( Per_CPU_Control *cpu_self )
_ISR_Local_disable( level );
- if ( cpu_self->dispatch_necessary ) {
+ if (
+ cpu_self->dispatch_necessary
+#if defined(RTEMS_SCORE_ROBUST_THREAD_DISPATCH)
+ || !_ISR_Is_enabled( level )
+#endif
+ ) {
_Thread_Do_dispatch( cpu_self, level );
} else {
cpu_self->thread_dispatch_disable_level = 0;