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authorJoel Sherrill <joel.sherrill@OARcorp.com>2011-03-16 20:05:06 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2011-03-16 20:05:06 +0000
commit06dcaf09e6c0eae0b3a3c8d84adb663d03a53a4b (patch)
tree931cf314d5a87d1d3dcd6e5c366b5ce58270a6aa /cpukit/score/include/rtems/score/smplock.h
parent2011-03-16 Joel Sherrill <joel.sherrill@oarcorp.com> (diff)
downloadrtems-06dcaf09e6c0eae0b3a3c8d84adb663d03a53a4b.tar.bz2
2011-03-16 Jennifer Averett <jennifer.averett@OARcorp.com>
PR 1729/cpukit * configure.ac, sapi/include/confdefs.h, sapi/src/exinit.c, score/Makefile.am, score/preinstall.am, score/cpu/i386/rtems/score/cpu.h, score/cpu/sparc/cpu_asm.S, score/cpu/sparc/rtems/score/cpu.h, score/include/rtems/score/basedefs.h, score/include/rtems/score/context.h, score/include/rtems/score/percpu.h, score/src/percpu.c, score/src/thread.c, score/src/threadcreateidle.c: Add next step in SMP support. This adds an allocated array of the Per_CPU structures to support multiple cpus vs a single instance of the structure which is still used if SMP support is disabled. Configuration support is also added to explicitly enable or disable SMP. But SMP can only be enabled for the CPUs which will support it initially -- SPARC and i386. With the stub BSP support, a BSP can be run as a single core SMP system from an RTEMS data structure standpoint. * aclocal/check-smp.m4, aclocal/enable-smp.m4, score/include/rtems/bspsmp.h, score/include/rtems/score/smplock.h, score/src/smp.c, score/src/smplock.c: New files.
Diffstat (limited to 'cpukit/score/include/rtems/score/smplock.h')
-rw-r--r--cpukit/score/include/rtems/score/smplock.h95
1 files changed, 95 insertions, 0 deletions
diff --git a/cpukit/score/include/rtems/score/smplock.h b/cpukit/score/include/rtems/score/smplock.h
new file mode 100644
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+++ b/cpukit/score/include/rtems/score/smplock.h
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+/**
+ * @file rtems/score/smplock.h
+ *
+ * This include file defines the interface for atomic locks
+ * which can be used in multiprocessor configurations.
+ */
+
+/*
+ * COPYRIGHT (c) 1989-2011.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ *
+ * $Id$
+ */
+
+#ifndef _RTEMS_LOCK_H
+#define _RTEMS_LOCK_H
+
+#include <rtems/score/isr.h>
+
+/**
+ * @defgroup RTEMS Lock Interface
+ *
+ */
+
+/**@{*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * This type is used to lock elements for atomic access.
+ *
+ * @note This type may move to RTEMS.
+ */
+typedef volatile uint32_t SMP_lock_Control;
+
+/**
+ * @brief Initialize a Lock
+ *
+ * This method is used to initialize the lock at @a lock.
+ *
+ * @param [in] lock is the address of the lock to obtain.
+ *
+ * @note This lock may be "too low" here. It may need to move
+ * out of the BSP area.
+ */
+void _SMP_lock_Spinlock_Initialize(
+ SMP_lock_Control *lock
+);
+
+/**
+ * @brief Obtain a Lock
+ *
+ * This method is used to obtain the lock at @a lock.
+ *
+ * @param [in] lock is the address of the lock to obtain.
+ *
+ * @return This method returns with processor interrupts disabled.
+ * The previous level is returned.
+ *
+ * @note This lock may be "too low" here. It may need to move
+ * out of the BSP area.
+ */
+ISR_Level _SMP_lock_Spinlock_Obtain(
+ SMP_lock_Control *lock
+);
+
+/**
+ * @brief Release a Lock
+ *
+ * This method is used to release the lock at @a lock.
+ *
+ * @param [in] lock is the address of the lock to obtain.
+ *
+ * @note This lock may be "too low" here. It may need to move
+ * out of the BSP area.
+ */
+void _SMP_lock_Spinlock_Release(
+ SMP_lock_Control *lock,
+ ISR_Level level
+);
+
+#ifdef __cplusplus
+}
+#endif
+
+/**@}*/
+
+#endif
+/* end of include file */