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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2016-11-11 15:45:10 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2016-11-18 07:30:33 +0100 |
| commit | 2072dd242f269ca7d3d14b8f4e2830f15e85e555 (patch) | |
| tree | 8e300c821ba705af87500c307273f46027ab4bbd /cpukit/score/include/rtems/score/percpu.h | |
| parent | arm: Provide CPU_Interrupt_frame for ARMv4 (diff) | |
| download | rtems-2072dd242f269ca7d3d14b8f4e2830f15e85e555.tar.bz2 | |
score: Add Per_CPU_Control::isr_dispatch_disable
Update #2751.
Diffstat (limited to '')
| -rw-r--r-- | cpukit/score/include/rtems/score/percpu.h | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/cpukit/score/include/rtems/score/percpu.h b/cpukit/score/include/rtems/score/percpu.h index ae789b85f5..d2025c0ccf 100644 --- a/cpukit/score/include/rtems/score/percpu.h +++ b/cpukit/score/include/rtems/score/percpu.h @@ -290,6 +290,16 @@ typedef struct Per_CPU_Control { uint32_t isr_nest_level; /** + * @brief Indicetes if an ISR thread dispatch is disabled. + * + * This flag is context switched with each thread. It indicates that this + * thread has an interrupt stack frame on its stack. By using this flag, we + * can avoid nesting more interrupt dispatching attempts on a previously + * interrupted thread's stack. + */ + uint32_t isr_dispatch_disable; + + /** * @brief The thread dispatch critical section nesting counter which is used * to prevent context switches at inopportune moments. */ @@ -780,8 +790,10 @@ RTEMS_INLINE_ROUTINE struct _Thread_Control *_Thread_Get_executing( void ) */ #define PER_CPU_ISR_NEST_LEVEL \ PER_CPU_END_STACK -#define PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL \ +#define PER_CPU_ISR_DISPATCH_DISABLE \ PER_CPU_ISR_NEST_LEVEL + 4 +#define PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL \ + PER_CPU_ISR_DISPATCH_DISABLE + 4 #define PER_CPU_OFFSET_EXECUTING \ PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL + 4 #define PER_CPU_OFFSET_HEIR \ |