summaryrefslogtreecommitdiffstats
path: root/cpukit/score/include/rtems/score/isr.h
diff options
context:
space:
mode:
authorJoel Sherrill <joel.sherrill@OARcorp.com>2004-11-01 13:22:41 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2004-11-01 13:22:41 +0000
commitbaff4dafe1ff85d128a55e7b73780ca28f5c7faf (patch)
treee2acdf92de467f283ecd11fe621a67e79301e1cc /cpukit/score/include/rtems/score/isr.h
parent2004-11-01 Ralf Corsepius <ralf_corsepius@rtems.org> (diff)
downloadrtems-baff4dafe1ff85d128a55e7b73780ca28f5c7faf.tar.bz2
2004-11-01 Joel Sherrill <joel@oarcorp.com>
* score/cpu/no_cpu/rtems/score/cpu.h, score/include/rtems/debug.h, score/include/rtems/seterr.h, score/include/rtems/system.h, score/include/rtems/score/address.h, score/include/rtems/score/apiext.h, score/include/rtems/score/apimutex.h, score/include/rtems/score/bitfield.h, score/include/rtems/score/chain.h, score/include/rtems/score/context.h, score/include/rtems/score/copyrt.h, score/include/rtems/score/coremsg.h, score/include/rtems/score/coremutex.h, score/include/rtems/score/coresem.h, score/include/rtems/score/heap.h, score/include/rtems/score/interr.h, score/include/rtems/score/isr.h, score/include/rtems/score/mpci.h, score/include/rtems/score/mppkt.h, score/include/rtems/score/objectmp.h, score/include/rtems/score/priority.h, score/include/rtems/score/stack.h, score/include/rtems/score/states.h, score/include/rtems/score/sysstate.h, score/include/rtems/score/thread.h, score/include/rtems/score/threadmp.h, score/include/rtems/score/threadq.h, score/include/rtems/score/tod.h, score/include/rtems/score/tqdata.h, score/include/rtems/score/userext.h, score/include/rtems/score/watchdog.h, score/include/rtems/score/wkspace.h, score/inline/rtems/score/address.inl, score/inline/rtems/score/chain.inl, score/inline/rtems/score/coremsg.inl, score/inline/rtems/score/coremutex.inl, score/inline/rtems/score/coresem.inl, score/inline/rtems/score/heap.inl, score/inline/rtems/score/isr.inl, score/inline/rtems/score/mppkt.inl, score/inline/rtems/score/objectmp.inl, score/inline/rtems/score/priority.inl, score/inline/rtems/score/stack.inl, score/inline/rtems/score/states.inl, score/inline/rtems/score/sysstate.inl, score/inline/rtems/score/thread.inl, score/inline/rtems/score/threadmp.inl, score/inline/rtems/score/tod.inl, score/inline/rtems/score/tqdata.inl, score/inline/rtems/score/userext.inl, score/inline/rtems/score/watchdog.inl, score/inline/rtems/score/wkspace.inl: Add Doxygen comments -- working modifications which are not complete and may have broken code. Committing so work and testing can proceed. * score/Doxyfile, score/mainpage.h: New files.
Diffstat (limited to 'cpukit/score/include/rtems/score/isr.h')
-rw-r--r--cpukit/score/include/rtems/score/isr.h124
1 files changed, 39 insertions, 85 deletions
diff --git a/cpukit/score/include/rtems/score/isr.h b/cpukit/score/include/rtems/score/isr.h
index 6064d1ed1e..a932eafcf7 100644
--- a/cpukit/score/include/rtems/score/isr.h
+++ b/cpukit/score/include/rtems/score/isr.h
@@ -1,11 +1,14 @@
-/* isr.h
+/**
+ * @file isr.h
*
* This include file contains all the constants and structures associated
* with the management of processor interrupt levels. This handler
* supports interrupt critical sections, vectoring of user interrupt
* handlers, nesting of interrupts, and manipulating interrupt levels.
- *
- * COPYRIGHT (c) 1989-1999.
+ */
+
+/*
+ * COPYRIGHT (c) 1989-2004.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
@@ -18,33 +21,37 @@
#ifndef __ISR_h
#define __ISR_h
+/**
+ * @defgroup ScoreISR ISR Handler
+ *
+ * This group contains functionality which provides the foundation
+ * ISR services used in all of the APIs supported by RTEMS.
+ */
+/**@{*/
+
#ifdef __cplusplus
extern "C" {
#endif
-/*
+/**
* The following type defines the control block used to manage
* the interrupt level portion of the status register.
*/
-
typedef uint32_t ISR_Level;
-/*
+/**
* The following type defines the type used to manage the vectors.
*/
-
typedef uint32_t ISR_Vector_number;
-/*
+/**
* Return type for ISR Handler
*/
-
typedef void ISR_Handler;
-/*
+/**
* Pointer to an ISR Handler
*/
-
#if (CPU_ISR_PASSES_FRAME_POINTER == 1)
typedef ISR_Handler ( *ISR_Handler_entry )(
ISR_Vector_number,
@@ -55,82 +62,59 @@ typedef ISR_Handler ( *ISR_Handler_entry )(
ISR_Vector_number
);
#endif
-/*
+
+/**
* This constant promotes out the number of vectors truly supported by
* the current CPU being used. This is usually the number of distinct vectors
* the cpu can vector.
*/
-
#define ISR_NUMBER_OF_VECTORS CPU_INTERRUPT_NUMBER_OF_VECTORS
-/*
+/**
* This constant promotes out the highest valid interrupt vector number.
*/
-
#define ISR_INTERRUPT_MAXIMUM_VECTOR_NUMBER CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER
-/*
+/**
* The following is TRUE if signals have been sent to the currently
* executing thread by an ISR handler.
*/
-
SCORE_EXTERN boolean _ISR_Signals_to_thread_executing;
-/*
+/**
* The following contains the interrupt service routine nest level.
* When this variable is zero, a thread is executing.
*/
-
SCORE_EXTERN volatile uint32_t _ISR_Nest_level;
-/*
+/**
* The following declares the Vector Table. Application
* interrupt service routines are vectored by the ISR Handler via this table.
*/
-
SCORE_EXTERN ISR_Handler_entry *_ISR_Vector_table;
-/*
- * _ISR_Handler_initialization
- *
- * DESCRIPTION:
- *
+/**
* This routine performs the initialization necessary for this handler.
*/
-
void _ISR_Handler_initialization ( void );
-/*
- * _ISR_Disable
- *
- * DESCRIPTION:
- *
+/**
* This routine disables all interrupts so that a critical section
* of code can be executing without being interrupted. Upon return,
* the argument _level will contain the previous interrupt mask level.
*/
-
#define _ISR_Disable( _level ) \
_CPU_ISR_Disable( _level )
-/*
- * _ISR_Enable
- *
- * DESCRIPTION:
- *
+/**
* This routine enables interrupts to the previous interrupt mask
* LEVEL. It is used at the end of a critical section of code to
* enable interrupts so they can be processed again.
*/
-
#define _ISR_Enable( _level ) \
_CPU_ISR_Enable( _level )
-/*
- * _ISR_Flash
- *
- * DESCRIPTION:
- *
+/**
* This routine temporarily enables interrupts to the previous
* interrupt mask level and then disables all interrupts so that
* the caller can continue into the second part of a critical
@@ -142,52 +126,32 @@ void _ISR_Handler_initialization ( void );
* must be selected with care to insure that the critical section
* properly protects itself.
*/
-
#define _ISR_Flash( _level ) \
_CPU_ISR_Flash( _level )
-/*
- * _ISR_Install_vector
- *
- * DESCRIPTION:
- *
+/**
* This routine installs new_handler as the interrupt service routine
* for the specified vector. The previous interrupt service routine is
* returned as old_handler.
*/
-
#define _ISR_Install_vector( _vector, _new_handler, _old_handler ) \
_CPU_ISR_install_vector( _vector, _new_handler, _old_handler )
-/*
- * _ISR_Get_level
- *
- * DESCRIPTION:
- *
+/**
* This routine returns the current interrupt level.
*/
-
#define _ISR_Get_level() \
_CPU_ISR_Get_level()
-/*
- * _ISR_Set_level
- *
- * DESCRIPTION:
- *
+/**
* This routine sets the current interrupt level to that specified
* by new_level. The new interrupt level is effective when the
* routine exits.
*/
-
#define _ISR_Set_level( _new_level ) \
_CPU_ISR_Set_level( _new_level )
-/*
- * _ISR_Handler
- *
- * DESCRIPTION:
- *
+/**
* This routine is the interrupt dispatcher. ALL interrupts
* are vectored to this routine so that minimal context can be saved
* and setup performed before the application's high-level language
@@ -197,40 +161,28 @@ void _ISR_Handler_initialization ( void );
* insure that the necessary thread scheduling operations are
* performed when the outermost interrupt service routine exits.
*
- * NOTE: Implemented in assembly language.
+ * @note Implemented in assembly language.
*/
-
void _ISR_Handler( void );
-/*
- * _ISR_Dispatch
- *
- * DESCRIPTION:
- *
+/**
* This routine provides a wrapper so that the routine
- * _Thread_Dispatch can be invoked when a reschedule is necessary
+ * @ref _Thread_Dispatch can be invoked when a reschedule is necessary
* at the end of the outermost interrupt service routine. This
* wrapper is necessary to establish the processor context needed
* by _Thread_Dispatch and to save the processor context which is
* corrupted by _Thread_Dispatch. This context typically consists
* of registers which are not preserved across routine invocations.
*
- * NOTE: Implemented in assembly language.
+ * @note Implemented in assembly language.
*/
-
void _ISR_Dispatch( void );
-/*PAGE
- *
- * _ISR_Is_in_progress
- *
- * DESCRIPTION:
- *
+/**
* This function returns TRUE if the processor is currently servicing
* and interrupt and FALSE otherwise. A return value of TRUE indicates
* that the caller is an interrupt service routine, NOT a thread. The
*/
-
#if (CPU_PROVIDES_ISR_IS_IN_PROGRESS == TRUE)
boolean _ISR_Is_in_progress( void );
#else
@@ -244,5 +196,7 @@ boolean _ISR_Is_in_progress( void );
}
#endif
+/**@}*/
+
#endif
/* end of include file */