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authorJoel Sherrill <joel.sherrill@OARcorp.com>2010-04-17 19:24:16 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2010-04-17 19:24:16 +0000
commitdace69bfc49b217fa80783e0e9092851622b03d7 (patch)
tree6bce6607917274ed0ed57274f396b0e4956bdc50 /cpukit/score/cpu
parent2010-04-17 Mike Frysinger <vapier.adi@gmail.com> (diff)
downloadrtems-dace69bfc49b217fa80783e0e9092851622b03d7.tar.bz2
2010-04-17 Allan Hessenflow <allanh@kallisti.com>
* cpu.c, cpu_asm.S, rtems/score/cpu.h: Fine tune registers saved in the context. The sp and imask registers need to be saved. Also allocated 12 bytes on the stack at thread entry as the abi requires that.
Diffstat (limited to 'cpukit/score/cpu')
-rw-r--r--cpukit/score/cpu/bfin/ChangeLog6
-rw-r--r--cpukit/score/cpu/bfin/cpu.c9
-rw-r--r--cpukit/score/cpu/bfin/cpu_asm.S20
-rw-r--r--cpukit/score/cpu/bfin/rtems/score/cpu.h5
4 files changed, 8 insertions, 32 deletions
diff --git a/cpukit/score/cpu/bfin/ChangeLog b/cpukit/score/cpu/bfin/ChangeLog
index 5f276f92e1..14bd10ba49 100644
--- a/cpukit/score/cpu/bfin/ChangeLog
+++ b/cpukit/score/cpu/bfin/ChangeLog
@@ -1,3 +1,9 @@
+2010-04-17 Allan Hessenflow <allanh@kallisti.com>
+
+ * cpu.c, cpu_asm.S, rtems/score/cpu.h: Fine tune registers saved in the
+ context. The sp and imask registers need to be saved. Also allocated
+ 12 bytes on the stack at thread entry as the abi requires that.
+
2010-04-17 Mike Frysinger <vapier.adi@gmail.com>
* cpu.c: Blackfin ABI requires L registers to be 0 upon function entry.
diff --git a/cpukit/score/cpu/bfin/cpu.c b/cpukit/score/cpu/bfin/cpu.c
index 4afab4ab7c..f342e75e44 100644
--- a/cpukit/score/cpu/bfin/cpu.c
+++ b/cpukit/score/cpu/bfin/cpu.c
@@ -192,15 +192,10 @@ void _CPU_Context_Initialize(
uint32_t stack_high; /* highest "stack aligned" address */
stack_high = ((uint32_t)(stack_base) + size);
- the_context->register_sp = stack_high;
+ /* blackfin abi requires caller to reserve 12 bytes on stack */
+ the_context->register_sp = stack_high - 12;
the_context->register_rets = (uint32_t) entry_point;
the_context->imask = new_level ? 0 : 0xffff;
-
- /* Blackfin C ABI requires L regs to be 0 upon func entry. */
- the_context->register_l0 = 0;
- the_context->register_l1 = 0;
- the_context->register_l2 = 0;
- the_context->register_l3 = 0;
}
diff --git a/cpukit/score/cpu/bfin/cpu_asm.S b/cpukit/score/cpu/bfin/cpu_asm.S
index 13ca83bc84..7180c635fc 100644
--- a/cpukit/score/cpu/bfin/cpu_asm.S
+++ b/cpukit/score/cpu/bfin/cpu_asm.S
@@ -255,16 +255,6 @@ __CPU_Context_switch:
[p0++] = fp;
[p0++] = sp;
- /* save length registers */
- r0 = l0;
- [p0++] = r0;
- r0 = l1;
- [p0++] = r0;
- r0 = l2;
- [p0++] = r0;
- r0 = l3;
- [p0++] = r0;
-
/* save rets */
r0 = rets;
[p0++] = r0;
@@ -290,16 +280,6 @@ restore:
fp = [p0++];
sp = [p0++];
- /* restore length registers */
- r0 = [p0++];
- l0 = r0;
- r0 = [p0++];
- l1 = r0;
- r0 = [p0++];
- l2 = r0;
- r0 = [p0++];
- l3 = r0;
-
/* restore rets */
r0 = [p0++];
rets = r0;
diff --git a/cpukit/score/cpu/bfin/rtems/score/cpu.h b/cpukit/score/cpu/bfin/rtems/score/cpu.h
index 8cb689db3e..f64b8e50ce 100644
--- a/cpukit/score/cpu/bfin/rtems/score/cpu.h
+++ b/cpukit/score/cpu/bfin/rtems/score/cpu.h
@@ -481,11 +481,6 @@ typedef struct {
uint32_t register_fp;
uint32_t register_sp;
- uint32_t register_l0;
- uint32_t register_l1;
- uint32_t register_l2;
- uint32_t register_l3;
-
uint32_t register_rets;
uint32_t imask;