diff options
author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2006-01-16 15:13:58 +0000 |
---|---|---|
committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2006-01-16 15:13:58 +0000 |
commit | 6a074363a2657a86b5f1ea0fc1185f68ad9f3c08 (patch) | |
tree | 3785d2da164f2c26988014ad5dbae6e35aa24147 /cpukit/score/cpu | |
parent | 2006-01-16 Joel Sherrill <joel@OARcorp.com> (diff) | |
download | rtems-6a074363a2657a86b5f1ea0fc1185f68ad9f3c08.tar.bz2 |
2006-01-16 Joel Sherrill <joel@OARcorp.com>
Large patch to improve Doxygen output. As a side-effect, grammar and
spelling errors were corrected, spacing errors were address, and some
variable names were improved.
* libmisc/monitor/mon-object.c, libmisc/monitor/monitor.h:
Account for changing OBJECTS_NO_CLASS to OBJECTS_CLASSIC_NO_CLASS.
* score/Doxyfile: Set output directory. Predefine some macro values.
Turn on graphical output.
* score/include/rtems/debug.h, score/include/rtems/seterr.h,
score/include/rtems/system.h, score/include/rtems/score/address.h,
score/include/rtems/score/apiext.h,
score/include/rtems/score/apimutex.h,
score/include/rtems/score/bitfield.h,
score/include/rtems/score/chain.h,
score/include/rtems/score/context.h,
score/include/rtems/score/coremsg.h,
score/include/rtems/score/coremutex.h,
score/include/rtems/score/coresem.h,
score/include/rtems/score/heap.h, score/include/rtems/score/interr.h,
score/include/rtems/score/isr.h, score/include/rtems/score/mpci.h,
score/include/rtems/score/mppkt.h,
score/include/rtems/score/object.h,
score/include/rtems/score/objectmp.h,
score/include/rtems/score/priority.h,
score/include/rtems/score/stack.h,
score/include/rtems/score/states.h,
score/include/rtems/score/sysstate.h,
score/include/rtems/score/thread.h,
score/include/rtems/score/threadmp.h,
score/include/rtems/score/threadq.h, score/include/rtems/score/tod.h,
score/include/rtems/score/tqdata.h,
score/include/rtems/score/userext.h,
score/include/rtems/score/watchdog.h,
score/include/rtems/score/wkspace.h,
score/inline/rtems/score/address.inl,
score/inline/rtems/score/chain.inl,
score/inline/rtems/score/coremutex.inl,
score/inline/rtems/score/coresem.inl,
score/inline/rtems/score/heap.inl,
score/inline/rtems/score/object.inl,
score/inline/rtems/score/stack.inl,
score/inline/rtems/score/thread.inl,
score/inline/rtems/score/tqdata.inl, score/macros/README,
score/src/heap.c, score/src/threadmp.c, score/src/threadready.c,
score/src/threadstartmultitasking.c: Improve generated Doxygen
output. Fix spelling and grammar errors in comments. Correct names of
some variables and propagate changes.
Diffstat (limited to 'cpukit/score/cpu')
-rw-r--r-- | cpukit/score/cpu/arm/rtems/score/cpu.h | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/cpukit/score/cpu/arm/rtems/score/cpu.h b/cpukit/score/cpu/arm/rtems/score/cpu.h index 68c6b291f5..ca1ac70334 100644 --- a/cpukit/score/cpu/arm/rtems/score/cpu.h +++ b/cpukit/score/cpu/arm/rtems/score/cpu.h @@ -8,6 +8,8 @@ * This include file contains information pertaining to the ARM * processor. * + * Copyright (c) 2006 OAR Corporation + * * Copyright (c) 2002 Advent Networks, Inc. * Jay Monkman <jmonkman@adventnetworks.com> * @@ -123,8 +125,7 @@ extern "C" { * If TRUE, then the memory is allocated during initialization. * If FALSE, then the memory is allocated during initialization. * - * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE - * or CPU_INSTALL_HARDWARE_INTERRUPT_STACK is TRUE. + * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE. */ #define CPU_ALLOCATE_INTERRUPT_STACK FALSE @@ -449,7 +450,7 @@ SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context; #define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE /* - * Should be large enough to run all RTEMS tests. This insures + * Should be large enough to run all RTEMS tests. This ensures * that a "reasonable" small application should not have any problems. */ @@ -803,7 +804,7 @@ void _CPU_Context_restore_fp( * Some CPUs have special instructions which swap a 32-bit quantity in * a single instruction (e.g. i486). It is probably best to avoid * an "endian swapping control bit" in the CPU. One good reason is - * that interrupts would probably have to be disabled to insure that + * that interrupts would probably have to be disabled to ensure that * an interrupt does not try to access the same "chunk" with the wrong * endian. Another good reason is that on some CPUs, the endian bit * endianness for ALL fetches -- both code and data -- so the code |