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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2021-07-16 13:27:00 +0200 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2021-07-16 13:42:27 +0200 |
commit | 36655b870c09e090b515011961c36fabd3f70e37 (patch) | |
tree | 057fafbd38141da93a2516657b9f9a84b7e6114f /cpukit/score/cpu | |
parent | sparc: Prefer RTEMS_FATAL_SOURCE_EXCEPTION (diff) | |
download | rtems-36655b870c09e090b515011961c36fabd3f70e37.tar.bz2 |
cpukit: occured -> occurred
Diffstat (limited to 'cpukit/score/cpu')
-rw-r--r-- | cpukit/score/cpu/mips/cpu_asm.S | 4 | ||||
-rw-r--r-- | cpukit/score/cpu/nios2/nios2-iic-low-level.S | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/cpukit/score/cpu/mips/cpu_asm.S b/cpukit/score/cpu/mips/cpu_asm.S index 5692af22d7..327df4d2e9 100644 --- a/cpukit/score/cpu/mips/cpu_asm.S +++ b/cpukit/score/cpu/mips/cpu_asm.S @@ -750,7 +750,7 @@ _ISR_Handler_Exception: ** Note, if the exception vector returns, rely on it to have ** adjusted EPC so we will return to some correct address. If ** this is not done, we might get stuck in an infinite loop because - ** we'll return to the instruction where the exception occured and + ** we'll return to the instruction where the exception occurred and ** it could throw again. ** ** It is expected the only code using the exception processing is @@ -776,7 +776,7 @@ _ISR_Handler_Exception: beqz t4,excnodelay NOP - * it did, now see if the branch occured or not * + * it did, now see if the branch occurred or not * li t3,CAUSE_BT AND t4,t1,t3 beqz t4,excnobranch diff --git a/cpukit/score/cpu/nios2/nios2-iic-low-level.S b/cpukit/score/cpu/nios2/nios2-iic-low-level.S index a3d138883b..11c2c5e9eb 100644 --- a/cpukit/score/cpu/nios2/nios2-iic-low-level.S +++ b/cpukit/score/cpu/nios2/nios2-iic-low-level.S @@ -137,7 +137,7 @@ stuck_in_exception: /* * Restore the saved registers, so that all general purpose registers - * have been restored to their state at the time the interrupt occured. + * have been restored to their state at the time the interrupt occurred. */ ldw r1, 0(sp) @@ -277,7 +277,7 @@ _ISR_Handler: /* * Restore the saved registers, so that all general purpose registers - * have been restored to their state at the time the interrupt occured. + * have been restored to their state at the time the interrupt occurred. */ ldw r1, 0(sp) |