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author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2006-11-14 21:44:25 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2006-11-14 21:44:25 +0000 |
commit | fe3037df30a1a690c32ed52d4ecfaa28ff3ae2f5 (patch) | |
tree | 9fe4e24f1f2aab0709a47b6ed294c1f57c73243d /cpukit/score/cpu/sparc | |
parent | Add. (diff) | |
download | rtems-fe3037df30a1a690c32ed52d4ecfaa28ff3ae2f5.tar.bz2 |
2006-11-14 Jiri Gaisler <jiri@gaisler.com>
* cpu_asm.S: Properly support synchronous traps.
Diffstat (limited to 'cpukit/score/cpu/sparc')
-rw-r--r-- | cpukit/score/cpu/sparc/ChangeLog | 4 | ||||
-rw-r--r-- | cpukit/score/cpu/sparc/cpu_asm.S | 5 |
2 files changed, 9 insertions, 0 deletions
diff --git a/cpukit/score/cpu/sparc/ChangeLog b/cpukit/score/cpu/sparc/ChangeLog index 3cad2c9cfa..2ab7895933 100644 --- a/cpukit/score/cpu/sparc/ChangeLog +++ b/cpukit/score/cpu/sparc/ChangeLog @@ -1,3 +1,7 @@ +2006-11-14 Jiri Gaisler <jiri@gaisler.com> + + * cpu_asm.S: Properly support synchronous traps. + 2006-01-16 Joel Sherrill <joel@OARcorp.com> * rtems/score/cpu.h: Part of a large patch to improve Doxygen output. diff --git a/cpukit/score/cpu/sparc/cpu_asm.S b/cpukit/score/cpu/sparc/cpu_asm.S index 95d5627be5..8bebc08c6c 100644 --- a/cpukit/score/cpu/sparc/cpu_asm.S +++ b/cpukit/score/cpu/sparc/cpu_asm.S @@ -570,10 +570,13 @@ __sparc_fq: sll %g4, 8, %g4 and %g4, SPARC_PSR_PIL_MASK, %g4 andn %l0, SPARC_PSR_PIL_MASK, %g5 + ba pil_fixed or %g4, %g5, %g5 #endif dont_fix_pil: + or %g5, SPARC_PSR_PIL_MASK, %g5 +pil_fixed: wr %g5, SPARC_PSR_ET_MASK, %psr ! **** ENABLE TRAPS **** dont_fix_pil2: @@ -605,6 +608,7 @@ dont_fix_pil2: */ mov %l0, %psr ! **** DISABLE TRAPS **** + nop; nop; nop /* * Decrement ISR nest level and Thread dispatch disable level. @@ -798,6 +802,7 @@ simple_return: good_task_window: mov %l0, %psr ! **** DISABLE TRAPS **** + nop; nop; nop ! and restore condition codes. ld [%g1 + ISF_G1_OFFSET], %g1 ! restore g1 jmp %l1 ! transfer control and |