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authorSebastian Huber <sebastian.huber@embedded-brains.de>2018-09-26 06:34:54 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2018-10-05 13:41:06 +0200
commit8776bb94197613a369b47b3adf4b2d4e0ba766ed (patch)
tree37f2177f56e8d758bc4433ea8f8d98851fa81a18 /cpukit/score/cpu/sparc
parentdev/sc16is752: Deal with a baud of zero (diff)
downloadrtems-8776bb94197613a369b47b3adf4b2d4e0ba766ed.tar.bz2
score: Remove CPU_PROVIDES_IDLE_THREAD_BODY
Remove the CPU_PROVIDES_IDLE_THREAD_BODY option to avoid unnecessary conditional compilation. Close #3539.
Diffstat (limited to 'cpukit/score/cpu/sparc')
-rw-r--r--cpukit/score/cpu/sparc/Makefile.am3
-rw-r--r--cpukit/score/cpu/sparc/include/rtems/score/cpu.h18
2 files changed, 4 insertions, 17 deletions
diff --git a/cpukit/score/cpu/sparc/Makefile.am b/cpukit/score/cpu/sparc/Makefile.am
index 2e0ab5999d..6c06ce0d11 100644
--- a/cpukit/score/cpu/sparc/Makefile.am
+++ b/cpukit/score/cpu/sparc/Makefile.am
@@ -3,8 +3,9 @@ include $(top_srcdir)/automake/compile.am
noinst_LIBRARIES = libscorecpu.a
libscorecpu_a_SOURCES =
libscorecpu_a_SOURCES += access_le.c
-libscorecpu_a_SOURCES += cpu.c
libscorecpu_a_SOURCES += cpu_asm.S
+libscorecpu_a_SOURCES += cpu.c
+libscorecpu_a_SOURCES += ../no_cpu/cpuidle.c
libscorecpu_a_SOURCES += sparc-access.S
libscorecpu_a_SOURCES += sparc-context-validate.S
libscorecpu_a_SOURCES += sparc-context-volatile-clobber.S
diff --git a/cpukit/score/cpu/sparc/include/rtems/score/cpu.h b/cpukit/score/cpu/sparc/include/rtems/score/cpu.h
index a53791ce3f..8c6212725d 100644
--- a/cpukit/score/cpu/sparc/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/sparc/include/rtems/score/cpu.h
@@ -136,22 +136,6 @@ extern "C" {
#define CPU_ENABLE_ROBUST_THREAD_DISPATCH FALSE
/**
- * Does this port provide a CPU dependent IDLE task implementation?
- *
- * - If TRUE, then the routine _CPU_Thread_Idle_body
- * must be provided and is the default IDLE thread body instead of
- * _CPU_Thread_Idle_body.
- *
- * - If FALSE, then use the generic IDLE thread body if the BSP does
- * not provide one.
- *
- * The SPARC architecture does not have a low power or halt instruction.
- * It is left to the BSP and/or CPU specific code to provide an IDLE
- * thread body which is aware of low power modes.
- */
-#define CPU_PROVIDES_IDLE_THREAD_BODY FALSE
-
-/**
* Does the stack grow up (toward higher addresses) or down
* (toward lower addresses)?
*
@@ -988,6 +972,8 @@ void _CPU_ISR_install_vector(
proc_ptr *old_handler
);
+void *_CPU_Thread_Idle_body( uintptr_t ignored );
+
/**
* @brief SPARC specific context switch.
*