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authorJiri Gaisler <jiri@gaisler.se>2019-01-18 18:00:47 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2019-01-22 12:50:08 +0100
commit9b2b389e8d6c9a871a3d5de882fc48b13bc9f1ac (patch)
tree813132b05c576d8327ae012439feb7207289f8c6 /cpukit/score/cpu/riscv
parentgrlib: use rtems_interrupt_handler_install() (diff)
downloadrtems-9b2b389e8d6c9a871a3d5de882fc48b13bc9f1ac.tar.bz2
grlib: use cpu-independent routines for uncached access
Update #3678.
Diffstat (limited to 'cpukit/score/cpu/riscv')
-rw-r--r--cpukit/score/cpu/riscv/headers.am2
-rw-r--r--cpukit/score/cpu/riscv/include/libcpu/access.h50
-rw-r--r--cpukit/score/cpu/riscv/include/libcpu/byteorder.h31
3 files changed, 83 insertions, 0 deletions
diff --git a/cpukit/score/cpu/riscv/headers.am b/cpukit/score/cpu/riscv/headers.am
index 415075ce46..abb8a42f78 100644
--- a/cpukit/score/cpu/riscv/headers.am
+++ b/cpukit/score/cpu/riscv/headers.am
@@ -1,4 +1,6 @@
## This file was generated by "./boostrap -H".
+include_libcpu_HEADERS += score/cpu/riscv/include/libcpu/access.h
+include_libcpu_HEADERS += score/cpu/riscv/include/libcpu/byteorder.h
include_rtems_HEADERS += score/cpu/riscv/include/rtems/asm.h
include_rtems_score_HEADERS += score/cpu/riscv/include/rtems/score/cpu.h
include_rtems_score_HEADERS += score/cpu/riscv/include/rtems/score/cpu_asm.h
diff --git a/cpukit/score/cpu/riscv/include/libcpu/access.h b/cpukit/score/cpu/riscv/include/libcpu/access.h
new file mode 100644
index 0000000000..cdf6b77122
--- /dev/null
+++ b/cpukit/score/cpu/riscv/include/libcpu/access.h
@@ -0,0 +1,50 @@
+/*
+ * access.h - access routines for SPARC. SPARC is big endian only.
+ *
+ * COPYRIGHT (c) 2011
+ * Aeroflex Gaisler.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef _LIBCPU_ACCESS_H
+#define _LIBCPU_ACCESS_H
+
+#include <rtems/system.h>
+#include <rtems/score/cpu.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* "Raw" access */
+extern uint8_t _ld8(uint8_t *addr);
+extern void _st8(uint8_t *addr, uint8_t val);
+extern uint16_t _ld16(uint16_t *addr);
+extern void _st16(uint16_t *addr, uint16_t val);
+extern uint32_t _ld32(uint32_t *addr);
+extern void _st32(uint32_t *addr, uint32_t val);
+extern uint64_t _ld64(uint64_t *addr);
+extern void _st64(uint64_t *addr, uint64_t val);
+
+/* Aliases for Big Endian */
+extern uint16_t _ld_be16(uint16_t *addr);
+extern void _st_be16(uint16_t *addr, uint16_t val);
+extern uint32_t _ld_be32(uint32_t *addr);
+extern void _st_be32(uint32_t *addr, uint32_t val);
+extern uint64_t _ld_be64(uint64_t *addr);
+extern void _st_be64(uint64_t *addr, uint64_t val);
+
+/* Little endian */
+extern uint16_t _ld_le16(uint16_t *addr);
+extern void _st_le16(uint16_t *addr, uint16_t val);
+extern uint32_t _ld_le32(uint32_t *addr);
+extern void _st_le32(uint32_t *addr, uint32_t val);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/cpukit/score/cpu/riscv/include/libcpu/byteorder.h b/cpukit/score/cpu/riscv/include/libcpu/byteorder.h
new file mode 100644
index 0000000000..939e51fe84
--- /dev/null
+++ b/cpukit/score/cpu/riscv/include/libcpu/byteorder.h
@@ -0,0 +1,31 @@
+/*
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef _LIBCPU_BYTEORDER_H
+#define _LIBCPU_BYTEORDER_H
+
+static inline void st_le32(volatile uint32_t *addr, uint32_t value)
+{
+ *(addr)=value ;
+}
+
+static inline uint32_t ld_le32(volatile uint32_t *addr)
+{
+ return(*addr);
+}
+
+static inline void st_le16(volatile uint16_t *addr, uint16_t value)
+{
+ *(addr)=value ;
+}
+
+static inline uint16_t ld_le16(volatile uint16_t *addr)
+{
+ return(*addr);
+}
+
+
+#endif