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authorHesham Almatary <hesham@alumni.york.ac.uk>2017-10-27 10:12:41 +1100
committerHesham Almatary <heshamelmatary@gmail.com>2017-10-28 18:28:21 +1100
commit660db8c86fa16dc67c40bdeebbf671e50a7f3087 (patch)
treeab08f69510c65205cf199c685b2623e9aacf8152 /cpukit/score/cpu/riscv32/riscv-exception-frame-print.c
parentcpukit: librpc - add riscv* to xdr_float.c v3 (diff)
downloadrtems-660db8c86fa16dc67c40bdeebbf671e50a7f3087.tar.bz2
cpukit: Add basic riscv32 architecture port v3
Limitations: * NO FPU support [TODO] Update #3109
Diffstat (limited to 'cpukit/score/cpu/riscv32/riscv-exception-frame-print.c')
-rw-r--r--cpukit/score/cpu/riscv32/riscv-exception-frame-print.c41
1 files changed, 41 insertions, 0 deletions
diff --git a/cpukit/score/cpu/riscv32/riscv-exception-frame-print.c b/cpukit/score/cpu/riscv32/riscv-exception-frame-print.c
new file mode 100644
index 0000000000..377616ceaa
--- /dev/null
+++ b/cpukit/score/cpu/riscv32/riscv-exception-frame-print.c
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2015 Hesham Almatary <hesham@alumni.york.ac.uk>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <rtems/score/cpu.h>
+#include <rtems/bspIo.h>
+#include <inttypes.h>
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
+{
+ int i;
+
+ for ( i = 0; i < 32; ++i ) {
+ printk( "x%02i = 0x%016" PRIx32 "\n", i, frame->x[i]);
+ }
+}