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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-06-26 07:48:06 +0200 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-06-27 08:58:18 +0200 |
commit | 52f4fb65b3f5f8db68452e1d6fb218c125a8ce2b (patch) | |
tree | 1e339e0711a5933fb4de5a6f27bf353375e0f044 /cpukit/score/cpu/riscv/riscv-context-volatile-clobber.S | |
parent | bsp/riscv: Do not clear integer registers at start (diff) | |
download | rtems-52f4fb65b3f5f8db68452e1d6fb218c125a8ce2b.tar.bz2 |
riscv: Format assembler files
Use tabs to match the GCC generated assembler output.
Update #3433.
Diffstat (limited to 'cpukit/score/cpu/riscv/riscv-context-volatile-clobber.S')
-rw-r--r-- | cpukit/score/cpu/riscv/riscv-context-volatile-clobber.S | 27 |
1 files changed, 14 insertions, 13 deletions
diff --git a/cpukit/score/cpu/riscv/riscv-context-volatile-clobber.S b/cpukit/score/cpu/riscv/riscv-context-volatile-clobber.S index 58ec25b9a5..7607e9d5bc 100644 --- a/cpukit/score/cpu/riscv/riscv-context-volatile-clobber.S +++ b/cpukit/score/cpu/riscv/riscv-context-volatile-clobber.S @@ -29,22 +29,23 @@ #include <rtems/asm.h> -.section .text + .section .text, "ax", @progbits + .align 2 PUBLIC(_CPU_Context_volatile_clobber) SYM(_CPU_Context_volatile_clobber): - .macro clobber_register reg - addi t0, t0, -1 - mv \reg, t0 - .endm + .macro clobber_register reg + addi t0, t0, -1 + mv \reg, t0 + .endm - clobber_register a0 - clobber_register a1 - clobber_register a2 - clobber_register a3 - clobber_register a4 - clobber_register a5 - clobber_register a6 + clobber_register a0 + clobber_register a1 + clobber_register a2 + clobber_register a3 + clobber_register a4 + clobber_register a5 + clobber_register a6 - ret + ret |