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author | Kinsey Moore <kinsey.moore@oarcorp.com> | 2021-08-11 16:27:32 -0500 |
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committer | Joel Sherrill <joel@rtems.org> | 2021-10-01 14:03:26 -0500 |
commit | 9c2cb68481635fa72b7c08644df70b3df037f430 (patch) | |
tree | df06735b9939b6f80ca0d903f941eb927a05c89d /cpukit/score/cpu/riscv/riscv-context-validate.S | |
parent | cpukit/aarch64: Use correct context register sets (diff) | |
download | rtems-9c2cb68481635fa72b7c08644df70b3df037f430.tar.bz2 |
cpukit/aarch64: Use correct interrupt level types
All other architectures use uint32_t for interrupt levels and there is
no reason not to do so on AArch64.
Diffstat (limited to 'cpukit/score/cpu/riscv/riscv-context-validate.S')
0 files changed, 0 insertions, 0 deletions