diff options
| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-06-27 08:54:13 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-06-29 10:04:37 +0200 |
| commit | b706b4a3c09184b2f8ebf5290dc2b1d4a4db6684 (patch) | |
| tree | 70654e29a9a7af7995aa6325e42ce36de176bccf /cpukit/score/cpu/riscv/riscv-context-initialize.c | |
| parent | riscv: Remove x8 initialization (diff) | |
| download | rtems-b706b4a3c09184b2f8ebf5290dc2b1d4a4db6684.tar.bz2 | |
riscv: Remove mstatus from thread context
The mstatus register contains no thread-specific state which must be
saved/restored during a context switch. Machine interrupts (MIE) must
be enabled during a context switch.
Create separate CPU_Interrupt_frame structure.
Update #3433.
Diffstat (limited to 'cpukit/score/cpu/riscv/riscv-context-initialize.c')
| -rw-r--r-- | cpukit/score/cpu/riscv/riscv-context-initialize.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/cpukit/score/cpu/riscv/riscv-context-initialize.c b/cpukit/score/cpu/riscv/riscv-context-initialize.c index 7baf06696f..0dce495b1a 100644 --- a/cpukit/score/cpu/riscv/riscv-context-initialize.c +++ b/cpukit/score/cpu/riscv/riscv-context-initialize.c @@ -35,7 +35,6 @@ #include <rtems/score/cpu.h> #include <rtems/score/address.h> -#include <rtems/score/riscv-utility.h> void _CPU_Context_Initialize( Context_Control *context, @@ -59,7 +58,4 @@ void _CPU_Context_Initialize( context->x[1] = (uintptr_t) entry_point; context->isr_dispatch_disable = 0; - - /* Enable interrupts and FP */ - context->mstatus = MSTATUS_FS | MSTATUS_MIE; } |