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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-09-08 10:37:05 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-09-19 09:09:22 +0200 |
| commit | a660e9dc47c522fe1a1b7f6e4af1795dbd6c20b1 (patch) | |
| tree | 390cdbf3680f7549dc30fa78747f733c6010cb1e /cpukit/score/cpu/riscv/include/rtems/score/cpu.h | |
| parent | validation: Test deadlock detection special case (diff) | |
| download | rtems-a660e9dc47c522fe1a1b7f6e4af1795dbd6c20b1.tar.bz2 | |
Do not use RTEMS_INLINE_ROUTINE
Directly use "static inline" which is available in C99 and later. This brings
the RTEMS implementation closer to standard C.
Close #3935.
Diffstat (limited to 'cpukit/score/cpu/riscv/include/rtems/score/cpu.h')
| -rw-r--r-- | cpukit/score/cpu/riscv/include/rtems/score/cpu.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/cpukit/score/cpu/riscv/include/rtems/score/cpu.h b/cpukit/score/cpu/riscv/include/rtems/score/cpu.h index 03f2ed8120..f0f3da05da 100644 --- a/cpukit/score/cpu/riscv/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/riscv/include/rtems/score/cpu.h @@ -186,12 +186,12 @@ static inline void riscv_interrupt_enable( uint32_t level ) riscv_interrupt_disable(); \ } while(0) -RTEMS_INLINE_ROUTINE bool _CPU_ISR_Is_enabled( unsigned long level ) +static inline bool _CPU_ISR_Is_enabled( unsigned long level ) { return ( level & RISCV_MSTATUS_MIE ) != 0; } -RTEMS_INLINE_ROUTINE void _CPU_ISR_Set_level( uint32_t level ) +static inline void _CPU_ISR_Set_level( uint32_t level ) { if ( ( level & CPU_MODES_INTERRUPT_MASK) == 0 ) { __asm__ volatile ( |