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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-06-28 09:32:26 +0200 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-06-29 10:04:38 +0200 |
commit | 52352387cc0b502fd42164604ae9217700b83e31 (patch) | |
tree | 310ce36df9400a55d09b11f87a9cb5bb0460584c /cpukit/score/cpu/riscv/include/rtems/asm.h | |
parent | riscv: Fix global construction (diff) | |
download | rtems-52352387cc0b502fd42164604ae9217700b83e31.tar.bz2 |
riscv: Add floating-point support
Update #3433.
Diffstat (limited to 'cpukit/score/cpu/riscv/include/rtems/asm.h')
-rw-r--r-- | cpukit/score/cpu/riscv/include/rtems/asm.h | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/cpukit/score/cpu/riscv/include/rtems/asm.h b/cpukit/score/cpu/riscv/include/rtems/asm.h index 024091375d..259fe3de2c 100644 --- a/cpukit/score/cpu/riscv/include/rtems/asm.h +++ b/cpukit/score/cpu/riscv/include/rtems/asm.h @@ -131,6 +131,38 @@ #endif /* __riscv_xlen */ +#if __riscv_flen == 32 + +#define FLREG flw + +#define FSREG fsw + +#define FMVYX fmv.s.x + +#define FMVXY fmv.x.s + +#elif __riscv_flen == 64 + +#define FLREG fld + +#define FSREG fsd + +#if __riscv_xlen == 32 + +#define FMVYX fmv.s.x + +#define FMVXY fmv.x.s + +#elif __riscv_xlen == 64 + +#define FMVYX fmv.d.x + +#define FMVXY fmv.x.d + +#endif /* __riscv_xlen */ + +#endif /* __riscv_flen */ + .macro GET_SELF_CPU_CONTROL REG #ifdef RTEMS_SMP csrr \REG, mscratch |