diff options
author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2015-10-27 10:20:02 +0100 |
---|---|---|
committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2015-10-28 13:04:19 +0100 |
commit | e96feebdd1c5815e8a607dc9ee00d1d0f5ff8524 (patch) | |
tree | aa5a14c4020cd242e63d43201d9de7892f0e311a /cpukit/score/cpu/powerpc/rtems | |
parent | CONFIGURE_IMFS_MEMFILE_BYTES_PER_BLOCK was undocumented and not error checked (diff) | |
download | rtems-e96feebdd1c5815e8a607dc9ee00d1d0f5ff8524.tar.bz2 |
powerpc: Add FSL cache defines
Diffstat (limited to 'cpukit/score/cpu/powerpc/rtems')
-rw-r--r-- | cpukit/score/cpu/powerpc/rtems/powerpc/registers.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h b/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h index c982e460fd..4ea631c319 100644 --- a/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h +++ b/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h @@ -550,7 +550,17 @@ lidate */ #define FSL_EIS_L1CFG0 515 #define FSL_EIS_L1CFG1 516 #define FSL_EIS_L1CSR0 1010 +#define FSL_EIS_L1CSR0_CFI (1 << (63 - 62)) #define FSL_EIS_L1CSR1 1011 +#define FSL_EIS_L1CSR1_ICFI (1 << (63 - 62)) + +/* Freescale Book E Implementation Standards (EIS): L2 Cache */ + +#define FSL_EIS_L2CFG0 519 +#define FSL_EIS_L2CSR0 1017 +#define FSL_EIS_L2CSR0_L2FI (1 << (63 - 42)) +#define FSL_EIS_L2CSR0_L2FL (1 << (63 - 52)) +#define FSL_EIS_L2CSR1 1018 /* Freescale Book E Implementation Standards (EIS): Timer */ |