diff options
| author | Ralf Corsepius <ralf.corsepius@rtems.org> | 2005-02-13 07:33:35 +0000 |
|---|---|---|
| committer | Ralf Corsepius <ralf.corsepius@rtems.org> | 2005-02-13 07:33:35 +0000 |
| commit | d3fcd2b0ecd43cf38f1897fc62fba2a8b5bec50e (patch) | |
| tree | 7877f0363525b2cf4bdcfbe0122158646bc20c5c /cpukit/score/cpu/powerpc/rtems/old-exceptions | |
| parent | 2005-02-13 Ralf Corsepius <ralf.corsepius@rtems.org> (diff) | |
| download | rtems-d3fcd2b0ecd43cf38f1897fc62fba2a8b5bec50e.tar.bz2 | |
2005-02-13 Ralf Corsepius <ralf.corsepius@rtems.org>
* rtems/old-exceptions/cpu.h: Add _PPC_MSR_DISABLE_MASK.
Use _PPC_MSR_DISABLE_MASK instead of PPC_MSR_DISABLE_MASK to set up
_disable_mask.
Diffstat (limited to 'cpukit/score/cpu/powerpc/rtems/old-exceptions')
| -rw-r--r-- | cpukit/score/cpu/powerpc/rtems/old-exceptions/cpu.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/cpukit/score/cpu/powerpc/rtems/old-exceptions/cpu.h b/cpukit/score/cpu/powerpc/rtems/old-exceptions/cpu.h index cdcb76df1c..fbc303ab23 100644 --- a/cpukit/score/cpu/powerpc/rtems/old-exceptions/cpu.h +++ b/cpukit/score/cpu/powerpc/rtems/old-exceptions/cpu.h @@ -683,6 +683,8 @@ void _CPU_Initialize_vectors(void); */ #ifndef ASM +extern const unsigned int _PPC_MSR_DISABLE_MASK; + #define _CPU_MSR_Value( _msr_value ) \ do { \ _msr_value = 0; \ @@ -694,7 +696,7 @@ void _CPU_Initialize_vectors(void); #if 0 #define _CPU_ISR_Disable( _isr_cookie ) \ - { register unsigned int _disable_mask = PPC_MSR_DISABLE_MASK; \ + { register unsigned int _disable_mask = _PPC_MSR_DISABLE_MASK; \ _isr_cookie = 0; \ asm volatile ( "mfmsr %0" : \ @@ -715,7 +717,7 @@ void _CPU_Initialize_vectors(void); #endif #define _CPU_ISR_Disable( _isr_cookie ) \ - { register unsigned int _disable_mask = PPC_MSR_DISABLE_MASK; \ + { register unsigned int _disable_mask = _PPC_MSR_DISABLE_MASK; \ _isr_cookie = 0; \ asm volatile ( \ "mfmsr %0; andc %1,%0,%1; mtmsr %1" : \ @@ -753,7 +755,7 @@ void _CPU_Initialize_vectors(void); #ifndef ASM #define _CPU_ISR_Flash( _isr_cookie ) \ - { register unsigned int _disable_mask = PPC_MSR_DISABLE_MASK; \ + { register unsigned int _disable_mask = _PPC_MSR_DISABLE_MASK; \ asm volatile ( \ "mtmsr %0; andc %1,%0,%1; mtmsr %1" : \ "=r" ((_isr_cookie)), "=r" ((_disable_mask)) : \ |