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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-12-23 14:18:06 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2015-01-13 11:37:28 +0100 |
| commit | 3e2647a7146d4b972c6a0290e6657bab0de18afa (patch) | |
| tree | 027f8a7d676d3ae80950344b3891072e2ca0a736 /cpukit/score/cpu/powerpc/cpu.c | |
| parent | bsps/powerpc: Use e500 exc categories for e6500 (diff) | |
| download | rtems-3e2647a7146d4b972c6a0290e6657bab0de18afa.tar.bz2 | |
powerpc: AltiVec and FPU context support
Add AltiVec and FPU support to the Context_Control in case we use the
e6500 multilib.
Add PPC_MULTILIB_ALTIVEC and PPC_MULTILIB_FPU multilib defines. Add
non-volatile AltiVec and FPU context to Context_Control. Add save/restore of
non-volatile AltiVec and FPU to _CPU_Context_switch(). Add save/restore
of volatile AltiVec and FPU context to the exception code. Adjust data
cache optimizations for the new context and cache line size.
Diffstat (limited to 'cpukit/score/cpu/powerpc/cpu.c')
| -rw-r--r-- | cpukit/score/cpu/powerpc/cpu.c | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/cpukit/score/cpu/powerpc/cpu.c b/cpukit/score/cpu/powerpc/cpu.c index 53b4eaa247..5383a8ee24 100644 --- a/cpukit/score/cpu/powerpc/cpu.c +++ b/cpukit/score/cpu/powerpc/cpu.c @@ -57,6 +57,47 @@ PPC_ASSERT_OFFSET(gpr2, GPR2); PPC_ASSERT_OFFSET(is_executing, IS_EXECUTING); #endif +#ifdef PPC_MULTILIB_ALTIVEC + RTEMS_STATIC_ASSERT( + PPC_CONTEXT_OFFSET_V20 % 16 == 0, + ppc_context_altivec + ); + PPC_ASSERT_OFFSET(v20, V20); + PPC_ASSERT_OFFSET(v21, V21); + PPC_ASSERT_OFFSET(v22, V22); + PPC_ASSERT_OFFSET(v23, V23); + PPC_ASSERT_OFFSET(v24, V24); + PPC_ASSERT_OFFSET(v25, V25); + PPC_ASSERT_OFFSET(v26, V26); + PPC_ASSERT_OFFSET(v27, V27); + PPC_ASSERT_OFFSET(v28, V28); + PPC_ASSERT_OFFSET(v29, V29); + PPC_ASSERT_OFFSET(v30, V30); + PPC_ASSERT_OFFSET(v31, V31); + PPC_ASSERT_OFFSET(vrsave, VRSAVE); +#endif + +#ifdef PPC_MULTILIB_FPU + PPC_ASSERT_OFFSET(f14, F14); + PPC_ASSERT_OFFSET(f15, F15); + PPC_ASSERT_OFFSET(f16, F16); + PPC_ASSERT_OFFSET(f17, F17); + PPC_ASSERT_OFFSET(f18, F18); + PPC_ASSERT_OFFSET(f19, F19); + PPC_ASSERT_OFFSET(f20, F20); + PPC_ASSERT_OFFSET(f21, F21); + PPC_ASSERT_OFFSET(f22, F22); + PPC_ASSERT_OFFSET(f23, F23); + PPC_ASSERT_OFFSET(f24, F24); + PPC_ASSERT_OFFSET(f25, F25); + PPC_ASSERT_OFFSET(f26, F26); + PPC_ASSERT_OFFSET(f27, F27); + PPC_ASSERT_OFFSET(f28, F28); + PPC_ASSERT_OFFSET(f29, F29); + PPC_ASSERT_OFFSET(f30, F30); + PPC_ASSERT_OFFSET(f31, F31); +#endif + RTEMS_STATIC_ASSERT( sizeof(Context_Control) % PPC_DEFAULT_CACHE_LINE_SIZE == 0, ppc_context_size |