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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-09-08 10:37:05 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-09-19 09:09:22 +0200 |
| commit | a660e9dc47c522fe1a1b7f6e4af1795dbd6c20b1 (patch) | |
| tree | 390cdbf3680f7549dc30fa78747f733c6010cb1e /cpukit/score/cpu/or1k | |
| parent | validation: Test deadlock detection special case (diff) | |
| download | rtems-a660e9dc47c522fe1a1b7f6e4af1795dbd6c20b1.tar.bz2 | |
Do not use RTEMS_INLINE_ROUTINE
Directly use "static inline" which is available in C99 and later. This brings
the RTEMS implementation closer to standard C.
Close #3935.
Diffstat (limited to 'cpukit/score/cpu/or1k')
| -rw-r--r-- | cpukit/score/cpu/or1k/include/rtems/score/cpu.h | 4 | ||||
| -rw-r--r-- | cpukit/score/cpu/or1k/include/rtems/score/cpuimpl.h | 6 |
2 files changed, 5 insertions, 5 deletions
diff --git a/cpukit/score/cpu/or1k/include/rtems/score/cpu.h b/cpukit/score/cpu/or1k/include/rtems/score/cpu.h index 8d9aaee4f9..ce1aa301b3 100644 --- a/cpukit/score/cpu/or1k/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/or1k/include/rtems/score/cpu.h @@ -316,7 +316,7 @@ static inline void or1k_interrupt_enable(uint32_t level) _OR1K_mtspr(CPU_OR1K_SPR_SR, (_level & ~CPU_OR1K_SPR_SR_IEE)); \ } while(0) -RTEMS_INLINE_ROUTINE bool _CPU_ISR_Is_enabled( uint32_t level ) +static inline bool _CPU_ISR_Is_enabled( uint32_t level ) { return ( level & CPU_OR1K_SPR_SR ) != 0; } @@ -468,7 +468,7 @@ void _CPU_ISR_install_raw_handler( typedef void ( *CPU_ISR_handler )( uint32_t ); -RTEMS_INLINE_ROUTINE void _CPU_ISR_install_vector( +static inline void _CPU_ISR_install_vector( uint32_t vector, CPU_ISR_handler new_handler, CPU_ISR_handler *old_handler diff --git a/cpukit/score/cpu/or1k/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/or1k/include/rtems/score/cpuimpl.h index 35d186990d..352f14589a 100644 --- a/cpukit/score/cpu/or1k/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/or1k/include/rtems/score/cpuimpl.h @@ -60,17 +60,17 @@ void _CPU_Context_volatile_clobber( uintptr_t pattern ); void _CPU_Context_validate( uintptr_t pattern ); -RTEMS_INLINE_ROUTINE void _CPU_Instruction_illegal( void ) +static inline void _CPU_Instruction_illegal( void ) { __asm__ volatile ( ".word 0" ); } -RTEMS_INLINE_ROUTINE void _CPU_Instruction_no_operation( void ) +static inline void _CPU_Instruction_no_operation( void ) { __asm__ volatile ( "l.nop" ); } -RTEMS_INLINE_ROUTINE void _CPU_Use_thread_local_storage( +static inline void _CPU_Use_thread_local_storage( const Context_Control *context ) { |