Add support for OpenRISC - Fixed issues

This work is based on the old or32 port (that has been
removed back in 2005) authored by Chris Ziomkowski. The patch includes the
basic functions every port should implement like: context switch, exception
handling, OpenRISC ABI and machine definitions and configurations.

1 files changed, 49 insertions, 0 deletions

diff --git a/cpukit/score/cpu/or1k/rtems/score/or1k.h b/cpukit/score/cpu/or1k/rtems/score/or1k.h
new file mode 100644
index 0000000000..e1a3ddce42
--- /dev/null
+++ b/cpukit/score/cpu/or1k/rtems/score/or1k.h
@@ -0,0 +1,49 @@
+/**
+ * @file rtems/score/or1k.h
+ */
+
+/*
+ *  This file contains information pertaining to the OR1K processor.
+ *
+ *  COPYRIGHT (c) 2014 Hesham ALMatary <heshamelmatary@gmail.com>
+ *
+ *  Based on code with the following copyright...
+ *  COPYRIGHT (c) 1989-1999, 2010.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef _RTEMS_SCORE_OR1K_H
+#define _RTEMS_SCORE_OR1K_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ *  This file contains the information required to build
+ *  RTEMS for a particular member of the OR1K family.
+ *  It does this by setting variables to indicate which
+ *  implementation dependent features are present in a particular
+ *  member of the family.
+ *
+ *  This is a good place to list all the known CPU models
+ *  that this port supports and which RTEMS CPU model they correspond
+ *  to.
+ */
+
+ /*
+ *  Define the name of the CPU family and specific model.
+ */
+
+#define CPU_NAME "OR1K"
+#define CPU_MODEL_NAME "OR1200"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTEMS_SCORE_OR1K_H */